JPS562515A - Signal amplifying circuit used for load cell balance - Google Patents

Signal amplifying circuit used for load cell balance

Info

Publication number
JPS562515A
JPS562515A JP7795079A JP7795079A JPS562515A JP S562515 A JPS562515 A JP S562515A JP 7795079 A JP7795079 A JP 7795079A JP 7795079 A JP7795079 A JP 7795079A JP S562515 A JPS562515 A JP S562515A
Authority
JP
Japan
Prior art keywords
amplifier
input terminal
load cell
resistances
amplifying circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7795079A
Other languages
Japanese (ja)
Inventor
Yoshihisa Nishiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba TEC Corp
Original Assignee
Tokyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electric Co Ltd filed Critical Tokyo Electric Co Ltd
Priority to JP7795079A priority Critical patent/JPS562515A/en
Publication of JPS562515A publication Critical patent/JPS562515A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to secure the stability of an open loop gain to a temperature while lessening an open loop gain error as much as possible by employing the two-state constitution of operational amplifiers.
CONSTITUTION: A couple of operational amplifiers Q1 and Q2 are provided at the front and rear stages, and the output terminal of front-stage amplifier Q1 is connected to uninverted input terminal "+" of rear-stage amplifier Q2. Then, the output terminal of amplifier Q2 is grounded via the series circuit of resistances R1 and R2 and further grounded via resistances R3 and R4 in series. Next, the connection point between resistances R1 and R2 is connected to inverted input terminal "-" of amplifier Q1, and that between R3 and R4 to inverted input terminal "-" of amplifier Q2. Then, a load cell output is input to uninverted input terminal "+" of amplifier Q1 and an amplified signal is led out of amplifier Q2 via its output terminal. Thus, an open gain error can be lessened and stability to a temperature can be secured.
COPYRIGHT: (C)1981,JPO&Japio
JP7795079A 1979-06-20 1979-06-20 Signal amplifying circuit used for load cell balance Pending JPS562515A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7795079A JPS562515A (en) 1979-06-20 1979-06-20 Signal amplifying circuit used for load cell balance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7795079A JPS562515A (en) 1979-06-20 1979-06-20 Signal amplifying circuit used for load cell balance

Publications (1)

Publication Number Publication Date
JPS562515A true JPS562515A (en) 1981-01-12

Family

ID=13648293

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7795079A Pending JPS562515A (en) 1979-06-20 1979-06-20 Signal amplifying circuit used for load cell balance

Country Status (1)

Country Link
JP (1) JPS562515A (en)

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