JPS55120232A - Repeater - Google Patents
RepeaterInfo
- Publication number
- JPS55120232A JPS55120232A JP2705279A JP2705279A JPS55120232A JP S55120232 A JPS55120232 A JP S55120232A JP 2705279 A JP2705279 A JP 2705279A JP 2705279 A JP2705279 A JP 2705279A JP S55120232 A JPS55120232 A JP S55120232A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier
- time
- signal
- gain
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/204—Multiple access
- H04B7/2043—Mixed mode, TDM and FDM systems
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Radio Relay Systems (AREA)
Abstract
PURPOSE:To make it possible to use both FDMA and TDMA signals for repeating amplification in common and then to make use of that effectively for a satellite repeater, etc., by providing a delay circuit whose delay time agrees with the time when a gain control signal and input signal arrive at a variable gain amplifier. CONSTITUTION:A signal branched 7 partially is level-detected and amplified 11 and then applied to input terminal C of variable gain amplifier 9 as gain control signal Sc. Input signal Sin, on the other hand, is applied to amplifier 9 via delay circuit 8 and delay time (gamma) of circuit 8 is determined so that the time when the gain of amplifier 9 has been controlled will be equalized by signal Sc to when signal Sin reaches amplifier 9. As a result, the gain can be varied according to the input signal level without time delay, so that a constant output can be obtained without reference to the speed of the input signal level. Further, there is the advantage to use it for both FDMA and TSMA signals.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2705279A JPS55120232A (en) | 1979-03-08 | 1979-03-08 | Repeater |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2705279A JPS55120232A (en) | 1979-03-08 | 1979-03-08 | Repeater |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55120232A true JPS55120232A (en) | 1980-09-16 |
Family
ID=12210292
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2705279A Pending JPS55120232A (en) | 1979-03-08 | 1979-03-08 | Repeater |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55120232A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0638998A1 (en) * | 1993-08-11 | 1995-02-15 | Plessey Semiconductors Limited | Fast-acting automatic gain control arrangement |
EP0654900A2 (en) * | 1993-11-19 | 1995-05-24 | Philips Patentverwaltung GmbH | Radio communication device with power control of transmission |
-
1979
- 1979-03-08 JP JP2705279A patent/JPS55120232A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0638998A1 (en) * | 1993-08-11 | 1995-02-15 | Plessey Semiconductors Limited | Fast-acting automatic gain control arrangement |
EP0654900A2 (en) * | 1993-11-19 | 1995-05-24 | Philips Patentverwaltung GmbH | Radio communication device with power control of transmission |
EP0654900A3 (en) * | 1993-11-19 | 1996-01-31 | Philips Patentverwaltung | Radio communication device with power control of transmission. |
US5832374A (en) * | 1993-11-19 | 1998-11-03 | U.S. Phillips Corporation | Radio transceiver including transmitter power control circuit |
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