JPS5624881A - Automatic waveform equalizing control system for television signal - Google Patents
Automatic waveform equalizing control system for television signalInfo
- Publication number
- JPS5624881A JPS5624881A JP10017379A JP10017379A JPS5624881A JP S5624881 A JPS5624881 A JP S5624881A JP 10017379 A JP10017379 A JP 10017379A JP 10017379 A JP10017379 A JP 10017379A JP S5624881 A JPS5624881 A JP S5624881A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- pulse
- horizontal synchronizing
- television signal
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/14—Picture signal circuitry for video frequency region
- H04N5/21—Circuitry for suppressing or minimising disturbance, e.g. moirĂ© or halo
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Filters That Use Time-Delay Elements (AREA)
- Cable Transmission Systems, Equalization Of Radio And Reduction Of Echo (AREA)
- Picture Signal Circuits (AREA)
- Details Of Television Systems (AREA)
Abstract
PURPOSE:To avoid the distortion of television signal where no test signal is superimposed, by stopping the automatic waveform equalization through the detection that the test signal is not superimposed on the television signal. CONSTITUTION:The pulse generating circuit 24 picks up the pulse (a0) of the specified part in the test signal superimposed on the vertical blanking period from the horizontal synchronizing signal, forms the clock pulse (f) for readout developed between the period of existing of the pulses (e) and (a0), and the next horizontal synchronizing signal, and the pulse (e) is fed to the NAND circuit 28 and the pulse (f) is to FF32. The circuit 24 inputs the horizontal synchronizing signal to FF36. When the television signal is input to the circuit 28, the signal excluding the pulse for the specified said part is formed, FF36 is set with this signal and reset with the horizontal synchronizing signal. When the output of FF36 is input to FF32, the logic ''1'', ''0'' of output of FF36 is discriminated at the time point of pulse (f) and the output of FF32 is controlled.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54100173A JPS5927551B2 (en) | 1979-08-08 | 1979-08-08 | Automatic waveform equalization control method for television signals |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54100173A JPS5927551B2 (en) | 1979-08-08 | 1979-08-08 | Automatic waveform equalization control method for television signals |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5624881A true JPS5624881A (en) | 1981-03-10 |
JPS5927551B2 JPS5927551B2 (en) | 1984-07-06 |
Family
ID=14266922
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54100173A Expired JPS5927551B2 (en) | 1979-08-08 | 1979-08-08 | Automatic waveform equalization control method for television signals |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5927551B2 (en) |
-
1979
- 1979-08-08 JP JP54100173A patent/JPS5927551B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5927551B2 (en) | 1984-07-06 |
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