JPS56168170A - Waveform shaping circuit - Google Patents
Waveform shaping circuitInfo
- Publication number
- JPS56168170A JPS56168170A JP7337380A JP7337380A JPS56168170A JP S56168170 A JPS56168170 A JP S56168170A JP 7337380 A JP7337380 A JP 7337380A JP 7337380 A JP7337380 A JP 7337380A JP S56168170 A JPS56168170 A JP S56168170A
- Authority
- JP
- Japan
- Prior art keywords
- input
- pulses
- counter
- counting
- pulse
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
- G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manipulation Of Pulses (AREA)
Abstract
PURPOSE:To decide the duty cycles of input pulses, provide hysteresis characteristics to measurement and stabilize operation by measuring the input pulses through using the clock pulses of the frequencies sufficiently higher than the frequency of the input pulses. CONSTITUTION:A reversible counter 9 is so controlled by a signal 14 that when an input pulse 15 is ''1'', it makes up counting and when an input pulse 4 is ''0'', it makes down counting. The frequencies f1, f2 of clock pulses 12, 13 are sufficiently higher than the frequency of the pulse 4, and are f1>f2. These are applied to the counter 9 after they receive prescribed controlling in a logical circuit 8. When a decided output 6 is ''1'', the rise of the counter 9 lowers rapidly and makes slow counting operation. When the output is ''0'', it makes the reverse operation, thereby providing stable operation. It is possible to provide hysteresis characteristics to the level decision by suitably selecting f1, f2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7337380A JPS56168170A (en) | 1980-05-28 | 1980-05-28 | Waveform shaping circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7337380A JPS56168170A (en) | 1980-05-28 | 1980-05-28 | Waveform shaping circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56168170A true JPS56168170A (en) | 1981-12-24 |
Family
ID=13516303
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7337380A Pending JPS56168170A (en) | 1980-05-28 | 1980-05-28 | Waveform shaping circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56168170A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6021973U (en) * | 1983-07-21 | 1985-02-15 | 日本電気株式会社 | Pulse signal discrimination circuit |
-
1980
- 1980-05-28 JP JP7337380A patent/JPS56168170A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6021973U (en) * | 1983-07-21 | 1985-02-15 | 日本電気株式会社 | Pulse signal discrimination circuit |
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