JPS56162161A - Input and output load measuring device - Google Patents

Input and output load measuring device

Info

Publication number
JPS56162161A
JPS56162161A JP6587780A JP6587780A JPS56162161A JP S56162161 A JPS56162161 A JP S56162161A JP 6587780 A JP6587780 A JP 6587780A JP 6587780 A JP6587780 A JP 6587780A JP S56162161 A JPS56162161 A JP S56162161A
Authority
JP
Japan
Prior art keywords
input
output
data
load
accumulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6587780A
Other languages
Japanese (ja)
Inventor
Tsuneo Watanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6587780A priority Critical patent/JPS56162161A/en
Publication of JPS56162161A publication Critical patent/JPS56162161A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To facilitate the input/output load measurement, etc. for every input/output device in the computer system, by selecting the measured values of accumulated input/output load by a load selecting circuit and by inputting them to a CPU. CONSTITUTION:A counter 15 receives clock pulses 14 generated at a constant period by a clock 13 and counts an accumulated input/output operation time and preserves the obtained accumulated input/output operation time in a memory 16. Meanwhile, if an input/output device is operating when a one-data input/output end signal 17 is applied, an AND circuit 18 is operated, and the accumulation value of the accumulated input/output data number is preserved in a memory 20 by a counter 19. Thus, when a CPU1 requires data, the measured data of accumulated input/output load is selected by a load data selecting circuit 21 and is input to the CPU1 as an input/output load data input/output signal 22.
JP6587780A 1980-05-20 1980-05-20 Input and output load measuring device Pending JPS56162161A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6587780A JPS56162161A (en) 1980-05-20 1980-05-20 Input and output load measuring device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6587780A JPS56162161A (en) 1980-05-20 1980-05-20 Input and output load measuring device

Publications (1)

Publication Number Publication Date
JPS56162161A true JPS56162161A (en) 1981-12-12

Family

ID=13299641

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6587780A Pending JPS56162161A (en) 1980-05-20 1980-05-20 Input and output load measuring device

Country Status (1)

Country Link
JP (1) JPS56162161A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63146146A (en) * 1986-12-09 1988-06-18 Nec Corp Operation evaluating device for computer system
JP2016021165A (en) * 2014-07-15 2016-02-04 ヤマハ株式会社 Observation circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63146146A (en) * 1986-12-09 1988-06-18 Nec Corp Operation evaluating device for computer system
JP2016021165A (en) * 2014-07-15 2016-02-04 ヤマハ株式会社 Observation circuit

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