JPS56157529A - Input and output control system for communication control device - Google Patents
Input and output control system for communication control deviceInfo
- Publication number
- JPS56157529A JPS56157529A JP6139280A JP6139280A JPS56157529A JP S56157529 A JPS56157529 A JP S56157529A JP 6139280 A JP6139280 A JP 6139280A JP 6139280 A JP6139280 A JP 6139280A JP S56157529 A JPS56157529 A JP S56157529A
- Authority
- JP
- Japan
- Prior art keywords
- buffer
- stored
- information
- control part
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer And Data Communications (AREA)
- Communication Control (AREA)
Abstract
PURPOSE:To improve the processing capability, by providing the first and the second buffers in the interface part to perform the operation, where start information such as a command is stored in the first buffer, and the operation, where data transfer and end information are stored in the second buffer, independently of each other. CONSTITUTION:A common control part 1, a line control part 2, and a interface control part 3 are provided to constitute a communication control device which performs a series of operations of start, data transfer, and end for a CPU6 by this control part 3. This interface control part 3 is provided with the first buffer 8 where start information such as a command is stored when the start from the CPU6 is detected and the second buffer 9 where data transfer information and end information from the common control part 1 are stored. The operation, where start information is stored in the buffer 8, and the operation, where transfer information and end information are stored in the buffer 9, are performed independently of each other by transfer control circuits provided in respective buffers 8 and 9, thereby improving the processing capability.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6139280A JPS56157529A (en) | 1980-05-09 | 1980-05-09 | Input and output control system for communication control device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6139280A JPS56157529A (en) | 1980-05-09 | 1980-05-09 | Input and output control system for communication control device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56157529A true JPS56157529A (en) | 1981-12-04 |
Family
ID=13169838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6139280A Pending JPS56157529A (en) | 1980-05-09 | 1980-05-09 | Input and output control system for communication control device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56157529A (en) |
-
1980
- 1980-05-09 JP JP6139280A patent/JPS56157529A/en active Pending
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