JPS56152063A - Common storage control system - Google Patents

Common storage control system

Info

Publication number
JPS56152063A
JPS56152063A JP5508080A JP5508080A JPS56152063A JP S56152063 A JPS56152063 A JP S56152063A JP 5508080 A JP5508080 A JP 5508080A JP 5508080 A JP5508080 A JP 5508080A JP S56152063 A JPS56152063 A JP S56152063A
Authority
JP
Japan
Prior art keywords
processors
memory
access
common
copying operation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5508080A
Other languages
Japanese (ja)
Inventor
Makoto Ebihara
Kazuyuki Masuo
Masato Suyama
Tomihide Seo
Masateru Tagami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP5508080A priority Critical patent/JPS56152063A/en
Publication of JPS56152063A publication Critical patent/JPS56152063A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/18—Handling requests for interconnection or transfer for access to memory bus based on priority control

Abstract

PURPOSE:To prevent a system from lowering of the processing performance, by performing access operation and storage copying operation in time division mode from plural processors to a doubled common memory constituting stand-by spare ones. CONSTITUTION:Doubled common memories 10 and 11, which can be switched at any time, as stand-by spare ones are accessible to processors 1-4 via storage controllers 12 and 13 in common. Controllers 12 and 13 are equipped with copying control parts 14 and 15 which control the copying operation of equalizing the contents of common memories 10 and 11 to each other under the command of processor 1, and contention circuits 16 and 17 which compare and select memory access of each processor with that of control parts 14 and 15, and memory access parts 18 and 19. When the copying operation of the memory and memory access from processors 2-4 are executed, circuits 16 and 17 compare access from control parts 14 and 15 with that from processors 2-4, word by word, to select one preferentially and access the memory in time-division mode. Consequently, the queuing and stopping of the processors are eliminated and the lowering of the processing performance is prevented.
JP5508080A 1980-04-25 1980-04-25 Common storage control system Pending JPS56152063A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5508080A JPS56152063A (en) 1980-04-25 1980-04-25 Common storage control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5508080A JPS56152063A (en) 1980-04-25 1980-04-25 Common storage control system

Publications (1)

Publication Number Publication Date
JPS56152063A true JPS56152063A (en) 1981-11-25

Family

ID=12988719

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5508080A Pending JPS56152063A (en) 1980-04-25 1980-04-25 Common storage control system

Country Status (1)

Country Link
JP (1) JPS56152063A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01109453A (en) * 1987-10-23 1989-04-26 Hitachi Ltd Storage area duplicating system
JPH01134646A (en) * 1987-11-20 1989-05-26 Fujitsu Ltd Exchanging memory control system
JPH03148737A (en) * 1989-11-06 1991-06-25 Nippon Telegr & Teleph Corp <Ntt> Memory data coincidence control system for duplex memory device
US5890218A (en) * 1990-09-18 1999-03-30 Fujitsu Limited System for allocating and accessing shared storage using program mode and DMA mode

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01109453A (en) * 1987-10-23 1989-04-26 Hitachi Ltd Storage area duplicating system
JPH01134646A (en) * 1987-11-20 1989-05-26 Fujitsu Ltd Exchanging memory control system
JPH03148737A (en) * 1989-11-06 1991-06-25 Nippon Telegr & Teleph Corp <Ntt> Memory data coincidence control system for duplex memory device
US5890218A (en) * 1990-09-18 1999-03-30 Fujitsu Limited System for allocating and accessing shared storage using program mode and DMA mode
US5963976A (en) * 1990-09-18 1999-10-05 Fujitsu Limited System for configuring a duplex shared storage

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