JPS56149607A - Arithmetic controller - Google Patents

Arithmetic controller

Info

Publication number
JPS56149607A
JPS56149607A JP5297580A JP5297580A JPS56149607A JP S56149607 A JPS56149607 A JP S56149607A JP 5297580 A JP5297580 A JP 5297580A JP 5297580 A JP5297580 A JP 5297580A JP S56149607 A JPS56149607 A JP S56149607A
Authority
JP
Japan
Prior art keywords
input
output
module
data
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5297580A
Other languages
Japanese (ja)
Inventor
Masao Oura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5297580A priority Critical patent/JPS56149607A/en
Publication of JPS56149607A publication Critical patent/JPS56149607A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/052Linking several PLC's

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Programmable Controllers (AREA)

Abstract

PURPOSE:To obtain an arithmetic controller that can set a various kinds of instruction words with a small number of bits, by using the number part within a module for the instruction word part in case access is given to the input and output with every input/output module. CONSTITUTION:The instruction stored in the program memory part 10 comprises the input/output number part 1 consisting of the module part 3 and the number part 4 within module plus the instruction word part 2. The instruction reading circuit 12 reads the data of the part 2 and then turns logically the switch signal to ''1'' in case access is given with every input/output module. Thus the data of the part 4 is sent to the arithmetic controlling circuit 18 in the form of an instruction word data. In case access is given independently to each input/output point of the input/output module, the data of the part 4 is sent to each input/output module 15 via the input/ output number driving part 14.
JP5297580A 1980-04-23 1980-04-23 Arithmetic controller Pending JPS56149607A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5297580A JPS56149607A (en) 1980-04-23 1980-04-23 Arithmetic controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5297580A JPS56149607A (en) 1980-04-23 1980-04-23 Arithmetic controller

Publications (1)

Publication Number Publication Date
JPS56149607A true JPS56149607A (en) 1981-11-19

Family

ID=12929888

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5297580A Pending JPS56149607A (en) 1980-04-23 1980-04-23 Arithmetic controller

Country Status (1)

Country Link
JP (1) JPS56149607A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4966251A (en) * 1972-09-15 1974-06-27
JPS54147386A (en) * 1978-05-09 1979-11-17 Hitachi Ltd Sequence controller

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4966251A (en) * 1972-09-15 1974-06-27
JPS54147386A (en) * 1978-05-09 1979-11-17 Hitachi Ltd Sequence controller

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