JPS5614709A - Agc circuit - Google Patents

Agc circuit

Info

Publication number
JPS5614709A
JPS5614709A JP9032479A JP9032479A JPS5614709A JP S5614709 A JPS5614709 A JP S5614709A JP 9032479 A JP9032479 A JP 9032479A JP 9032479 A JP9032479 A JP 9032479A JP S5614709 A JPS5614709 A JP S5614709A
Authority
JP
Japan
Prior art keywords
circuit
signal
amplifier
agc
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9032479A
Other languages
Japanese (ja)
Inventor
Shigeru Tanizawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP9032479A priority Critical patent/JPS5614709A/en
Publication of JPS5614709A publication Critical patent/JPS5614709A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20—Automatic control

Abstract

PURPOSE:To make it possible to exercise stable AGC over a pulsating signal small in duty factor by controlling the gain of a signal system stably by detecting the peak of an input signal and then by sampling and holding the detected value. CONSTITUTION:A double pulse, applied to input terminal 10, is applied to AGC amplifier 5 and peak holding circuit 1, the output of which is further applied to sample holding circuit 2. Both circuits 1 and 2 are brought under the control of control circuit 6 and the output of circuit 2 is applied to comparing circuit 4 by way of logarithmic amplifier 3. Then, this comparing circuit 4 compares a signal from logarithmic amplifier 3 to that from reference voltage source 7 to generate its error signal voltage, controlling the gain of the AGC amplifier.
JP9032479A 1979-07-18 1979-07-18 Agc circuit Pending JPS5614709A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9032479A JPS5614709A (en) 1979-07-18 1979-07-18 Agc circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9032479A JPS5614709A (en) 1979-07-18 1979-07-18 Agc circuit

Publications (1)

Publication Number Publication Date
JPS5614709A true JPS5614709A (en) 1981-02-13

Family

ID=13995333

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9032479A Pending JPS5614709A (en) 1979-07-18 1979-07-18 Agc circuit

Country Status (1)

Country Link
JP (1) JPS5614709A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60182209A (en) * 1984-02-29 1985-09-17 Nippon Telegr & Teleph Corp <Ntt> Automatic gain control circuit
KR19990012236A (en) * 1997-07-28 1999-02-25 윤종용 ALB with automatic gain control Video Amplifier

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60182209A (en) * 1984-02-29 1985-09-17 Nippon Telegr & Teleph Corp <Ntt> Automatic gain control circuit
JPH0423841B2 (en) * 1984-02-29 1992-04-23 Nippon Denshin Denwa Kk
KR19990012236A (en) * 1997-07-28 1999-02-25 윤종용 ALB with automatic gain control Video Amplifier

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