JPS56145416A - Channel control system - Google Patents

Channel control system

Info

Publication number
JPS56145416A
JPS56145416A JP4864880A JP4864880A JPS56145416A JP S56145416 A JPS56145416 A JP S56145416A JP 4864880 A JP4864880 A JP 4864880A JP 4864880 A JP4864880 A JP 4864880A JP S56145416 A JPS56145416 A JP S56145416A
Authority
JP
Japan
Prior art keywords
channel
word group
ccb2
control
group
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4864880A
Other languages
Japanese (ja)
Inventor
Yasuo Kaneko
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4864880A priority Critical patent/JPS56145416A/en
Publication of JPS56145416A publication Critical patent/JPS56145416A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Abstract

PURPOSE:To advance the period of delivery without the need to develop a new channel or the remodel a channel, by converting a group of channel control words into those different in format and by exercising input/output control by using the converted channel control word group. CONSTITUTION:When to receive data from card reader 8, CPU3 sends to channel 5 the starting address of main storage device 4 where channel control word group describing control information is stored. While using this starting address, channel 5 reads word group CCB2 out of device 4 directly and stores it in the internal storage temporarily. Word group CCB2 is then converted into word group CCB2' differing in format with word group CCB1 used by CPU1. This word group CCB2' is used to transfer various pieces of information to respective registers, and then channel 5 starts the control over the input operation for data from card reader 8.
JP4864880A 1980-04-15 1980-04-15 Channel control system Pending JPS56145416A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4864880A JPS56145416A (en) 1980-04-15 1980-04-15 Channel control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4864880A JPS56145416A (en) 1980-04-15 1980-04-15 Channel control system

Publications (1)

Publication Number Publication Date
JPS56145416A true JPS56145416A (en) 1981-11-12

Family

ID=12809173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4864880A Pending JPS56145416A (en) 1980-04-15 1980-04-15 Channel control system

Country Status (1)

Country Link
JP (1) JPS56145416A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6136848A (en) * 1984-07-09 1986-02-21 ウオング・ラボラトリーズ・インコーポレーテツド Emulation for data processing system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6136848A (en) * 1984-07-09 1986-02-21 ウオング・ラボラトリーズ・インコーポレーテツド Emulation for data processing system

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