JPS56138947A - Manufacture of ic memory - Google Patents

Manufacture of ic memory

Info

Publication number
JPS56138947A
JPS56138947A JP4175180A JP4175180A JPS56138947A JP S56138947 A JPS56138947 A JP S56138947A JP 4175180 A JP4175180 A JP 4175180A JP 4175180 A JP4175180 A JP 4175180A JP S56138947 A JPS56138947 A JP S56138947A
Authority
JP
Japan
Prior art keywords
fusion connection
layer
memory
wire
wire layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4175180A
Other languages
Japanese (ja)
Inventor
Hajime Kamioka
Junji Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4175180A priority Critical patent/JPS56138947A/en
Publication of JPS56138947A publication Critical patent/JPS56138947A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)

Abstract

PURPOSE:To facilitate the disconnection of a fusion connection of wire layers and improve the reliability of PROM memory formed by melting the wire layers by laser annealing desired fusion connection part of the nondoped wire layers and injecting impurity at the position except the fusion connection. CONSTITUTION:A silicon oxide film 10 is covered on the surface of the memory cell of a substrate, and a polycrystalline Si layer 11 of 4,000Angstrom thick nondoped is formed as a conductive wire layer thereon. Aluminum 13 is covered on the part except desired fusion connection 12 as mask, when Nd:YAG laser light is irradiated to the entire surface, exposed fusion connection is crystallized to increase the grain diameter to 10mum, while the masked wire layer becomes fine crystalline grains of 1,000Angstrom . After removing the aluminum layer, with the film 14 as a mask arsenic ions are injected to the part excpet the fused part. When overcurrent is applied thereto, the fusion connection can be readily disconnected. Thus, the writing error of forming a program can be eliminated to improve the reliability of the memory.
JP4175180A 1980-03-31 1980-03-31 Manufacture of ic memory Pending JPS56138947A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4175180A JPS56138947A (en) 1980-03-31 1980-03-31 Manufacture of ic memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4175180A JPS56138947A (en) 1980-03-31 1980-03-31 Manufacture of ic memory

Publications (1)

Publication Number Publication Date
JPS56138947A true JPS56138947A (en) 1981-10-29

Family

ID=12617116

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4175180A Pending JPS56138947A (en) 1980-03-31 1980-03-31 Manufacture of ic memory

Country Status (1)

Country Link
JP (1) JPS56138947A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63161641A (en) * 1986-12-25 1988-07-05 Nec Corp Semiconductor memory device
KR100979367B1 (en) * 2008-03-19 2010-08-31 주식회사 하이닉스반도체 Method for forming the fuse of semiconductor device
US7923307B2 (en) * 2007-12-27 2011-04-12 Hynix Semiconductor Inc. Semiconductor device with fuse and method for fabricating the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63161641A (en) * 1986-12-25 1988-07-05 Nec Corp Semiconductor memory device
US7923307B2 (en) * 2007-12-27 2011-04-12 Hynix Semiconductor Inc. Semiconductor device with fuse and method for fabricating the same
KR100979367B1 (en) * 2008-03-19 2010-08-31 주식회사 하이닉스반도체 Method for forming the fuse of semiconductor device
US8017454B2 (en) 2008-03-19 2011-09-13 Hynix Semiconductor Inc. Fuse of semiconductor device and method for forming the same
US8324664B2 (en) 2008-03-19 2012-12-04 Hynix Semiconductor Inc. Fuse of a semiconductor device

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