JPS5613826A - Synthesizer receiver - Google Patents
Synthesizer receiverInfo
- Publication number
- JPS5613826A JPS5613826A JP8939879A JP8939879A JPS5613826A JP S5613826 A JPS5613826 A JP S5613826A JP 8939879 A JP8939879 A JP 8939879A JP 8939879 A JP8939879 A JP 8939879A JP S5613826 A JPS5613826 A JP S5613826A
- Authority
- JP
- Japan
- Prior art keywords
- fluctuation
- frequency
- register
- correction
- reception
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Channel Selection Circuits, Automatic Tuning Circuits (AREA)
- Superheterodyne Receivers (AREA)
Abstract
PURPOSE: To assure the high-accuracy reception by giving the correction to the division ratio of the programable divider in accordance with the detection extent of the frequency fluctuation to the detection output and then giving the correction to the fluctuation of the frequency.
CONSTITUTION: Control circuit 7 is provided to set division ratio N of programable divider 3 which is a component element of the PLL forming local oscillating circuit 1 of the radio receiver. Thus in case some fluctuation is caused to the intermediate frequency by some cause during reception of the broadcast, the addition and the subtraction is carried out at arithmetic circuit 8 between the data of the 2nd register 10 and constant data "1" given from ROM13 by control signals S1 and S2 supplied from frequency fluctuation detecting circuit 15. And this calculation result is transferred to register 10 via the 1st register 9 to receive the ±1 operation again with the data of register 10. As a result, the division retio of divider 3 increases or decreases by 1. In other words, local oscillation frequency f0 receives the fine adjustment in the unit of 1kHz. Thus the ± operation is continued until the fluctuation of the frequency becomes zero to give the correction to the fluctuation at all times during the reception.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8939879A JPS6022847B2 (en) | 1979-07-14 | 1979-07-14 | synthesizer receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP8939879A JPS6022847B2 (en) | 1979-07-14 | 1979-07-14 | synthesizer receiver |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5613826A true JPS5613826A (en) | 1981-02-10 |
JPS6022847B2 JPS6022847B2 (en) | 1985-06-04 |
Family
ID=13969534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP8939879A Expired JPS6022847B2 (en) | 1979-07-14 | 1979-07-14 | synthesizer receiver |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6022847B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59189332U (en) * | 1983-05-31 | 1984-12-15 | パイオニア株式会社 | PLL receiver |
JPH02161807A (en) * | 1989-11-02 | 1990-06-21 | Pioneer Electron Corp | Pll receiver |
-
1979
- 1979-07-14 JP JP8939879A patent/JPS6022847B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59189332U (en) * | 1983-05-31 | 1984-12-15 | パイオニア株式会社 | PLL receiver |
JPH02161807A (en) * | 1989-11-02 | 1990-06-21 | Pioneer Electron Corp | Pll receiver |
Also Published As
Publication number | Publication date |
---|---|
JPS6022847B2 (en) | 1985-06-04 |
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