JPS56137754A - Control system of information transferring - Google Patents

Control system of information transferring

Info

Publication number
JPS56137754A
JPS56137754A JP3987180A JP3987180A JPS56137754A JP S56137754 A JPS56137754 A JP S56137754A JP 3987180 A JP3987180 A JP 3987180A JP 3987180 A JP3987180 A JP 3987180A JP S56137754 A JPS56137754 A JP S56137754A
Authority
JP
Japan
Prior art keywords
assignment
buffer
information transfer
assigned
request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3987180A
Other languages
Japanese (ja)
Inventor
Toshio Ishii
Masaaki Takano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP3987180A priority Critical patent/JPS56137754A/en
Publication of JPS56137754A publication Critical patent/JPS56137754A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To improve the information transfer efficiency of a system on the whole by modifying the assignment by monitoring in-use states of resources assigned to calls and then by modifying the information transfer efficiency on the basis of the modification of the assignment. CONSTITUTION:In response to request (2) for buffer assignment modification from call processing circuit 5, buffer control circuit 13 controlling the assignment of buffer memories 9-12 to all communication circuits 1-4 monitors in-use states of buffer memories 9-12 having been assigned to respective communication circuits 1-4 and then modifies the assignment of buffer memories 9 and 10 between communication circuit 2, having empty buffer 102 satisfying the request requirements, and communication circuit 1 generating request. Then, relative call processing circuit 6 checks efficiency in information transfer again on the basis of a newly assigned buffer memory and, upon occasion, sends modification request control signal (5), so that the information transfer can be performed with assigned efficiency in response to new emergency call (1).
JP3987180A 1980-03-28 1980-03-28 Control system of information transferring Pending JPS56137754A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3987180A JPS56137754A (en) 1980-03-28 1980-03-28 Control system of information transferring

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3987180A JPS56137754A (en) 1980-03-28 1980-03-28 Control system of information transferring

Publications (1)

Publication Number Publication Date
JPS56137754A true JPS56137754A (en) 1981-10-27

Family

ID=12565035

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3987180A Pending JPS56137754A (en) 1980-03-28 1980-03-28 Control system of information transferring

Country Status (1)

Country Link
JP (1) JPS56137754A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03262232A (en) * 1990-03-13 1991-11-21 Canon Inc Isdn packet switchboard
JP2004321938A (en) * 2003-04-24 2004-11-18 Kurimoto Ltd Cyclone type separator
JP2008080244A (en) * 2006-09-27 2008-04-10 Nippon Steel Corp Multicyclone type dust collector

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03262232A (en) * 1990-03-13 1991-11-21 Canon Inc Isdn packet switchboard
JP2004321938A (en) * 2003-04-24 2004-11-18 Kurimoto Ltd Cyclone type separator
JP2008080244A (en) * 2006-09-27 2008-04-10 Nippon Steel Corp Multicyclone type dust collector

Similar Documents

Publication Publication Date Title
JPS56137754A (en) Control system of information transferring
JPS56110125A (en) Data processing device
JPS5723166A (en) Parallel data processing system driven by tree structure data
JPS6335155B2 (en)
JPS5787261A (en) Congestion control system
JPS54116809A (en) Preventive system for infinite transfer of incoming transfer call
JPS56135266A (en) Data processing system
JPS5696346A (en) Supervisory and control system of multisystem
JPS57211628A (en) Controller for shared input and output loop bus of multicomputer system
JPS5769337A (en) Data base access system
JPS6461149A (en) Overload control system for packet exchange
JPS56123191A (en) Inter-processor communication control system
JPS5787262A (en) Charging data gathering system
JPS5759220A (en) Data transfer system
JPS57136239A (en) Device address switching system
JPS56132888A (en) Representing selection system
JPS57168331A (en) Control method for shared input and output bus
JPS5593358A (en) Memory unit operation system for telephone exchange network
JPS55131829A (en) Transfer system of shared memory under communication control
JPS5361931A (en) Communication control device
JPS5726950A (en) Switching processing system for incoming control procedure
JPS52123803A (en) Speak path control on electronic exchange
JPS57199357A (en) Data transmission controller
JPS5711561A (en) Virtual call set and control system
JPS57166765A (en) Connection controlling system between terminal devices