JPS56118159A - Common storage device - Google Patents

Common storage device

Info

Publication number
JPS56118159A
JPS56118159A JP2052380A JP2052380A JPS56118159A JP S56118159 A JPS56118159 A JP S56118159A JP 2052380 A JP2052380 A JP 2052380A JP 2052380 A JP2052380 A JP 2052380A JP S56118159 A JPS56118159 A JP S56118159A
Authority
JP
Japan
Prior art keywords
memories
same
data
packet
storage device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2052380A
Other languages
Japanese (ja)
Other versions
JPS6047628B2 (en
Inventor
Hideo Aiiso
Toru Nakagawa
Isamu Yamazaki
Tai Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2052380A priority Critical patent/JPS6047628B2/en
Publication of JPS56118159A publication Critical patent/JPS56118159A/en
Publication of JPS6047628B2 publication Critical patent/JPS6047628B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/161—Computing infrastructure, e.g. computer clusters, blade chassis or hardware partitioning

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Software Systems (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To obtain the common storage device which can read out a plurality of data processors at the same time, by providing the packet memory with equal number of sets as that of data processors, and storing the same data to the same address of the packet memories. CONSTITUTION:Packet memories PM0-PM63 as the same sets of those of data processors PU0-PU63 are provided and the constitution is made that all the memories PM0-PM63 can store the same data to the same address. Further, the memories PM0-PM63 are provided with control sections PMC0-PMC63 and priority determining circuits PDL0-PDL63, memories PM0-PM63 are commonly connected to the packet memory bus PMBUS, and the memories PM0-PM63 are connected to operation sections CPU0-CPU63 of the devices PU0-PU63 via local buses LBUS0- LBUS63. Further, the data write-in and readout request from the devices PU0- PU63 is controlled at the same time with the control sections PMC0- PMC63 according to the output of the circuits PDL0-PDL63.
JP2052380A 1980-02-22 1980-02-22 shared storage Expired JPS6047628B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2052380A JPS6047628B2 (en) 1980-02-22 1980-02-22 shared storage

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2052380A JPS6047628B2 (en) 1980-02-22 1980-02-22 shared storage

Publications (2)

Publication Number Publication Date
JPS56118159A true JPS56118159A (en) 1981-09-17
JPS6047628B2 JPS6047628B2 (en) 1985-10-22

Family

ID=12029515

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2052380A Expired JPS6047628B2 (en) 1980-02-22 1980-02-22 shared storage

Country Status (1)

Country Link
JP (1) JPS6047628B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5786962A (en) * 1980-11-19 1982-05-31 Hitachi Ltd Memory control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5786962A (en) * 1980-11-19 1982-05-31 Hitachi Ltd Memory control system

Also Published As

Publication number Publication date
JPS6047628B2 (en) 1985-10-22

Similar Documents

Publication Publication Date Title
DE69535672D1 (en) Synchronous NAND DRAM architecture
JPS5652454A (en) Input/output control method of variable word length memory
ES8105872A1 (en) Memory system comprising a serial storage device.
GB1360930A (en) Memory and addressing system therefor
JPS6428752A (en) Data processor
US3231862A (en) Memory bus control unit
JPS52122440A (en) Device for connecting or disconnecting random access memory array data output line to or from data bus
JPS56118159A (en) Common storage device
GB1376364A (en) Memory subsystem array
DK123955B (en) Buffer memory device for causing a delayed addressing in a computer controlled telecommunication system.
GB1044580A (en) System for reading from a large computer-store
JPH0447920B2 (en)
JPS5713562A (en) Control system of external memory
ES395213A1 (en) Time-division multiplex switching circuitry
JPS57157365A (en) Busy control system of memory controller
JPS5533282A (en) Buffer control system
GB1225252A (en)
JPS57182247A (en) Buffer memory device
GB1520484A (en) Data processing system
JPS5562580A (en) Buffer memory unit
JPS57127981A (en) Digital signal storage device
JPS5733472A (en) Memory access control system
JPS5532288A (en) Lsi memory
JPS5578324A (en) Direct memory access system
JPS56143582A (en) Storage device