JPS56116367A - Code conversion system for facsimile signal - Google Patents

Code conversion system for facsimile signal

Info

Publication number
JPS56116367A
JPS56116367A JP1945880A JP1945880A JPS56116367A JP S56116367 A JPS56116367 A JP S56116367A JP 1945880 A JP1945880 A JP 1945880A JP 1945880 A JP1945880 A JP 1945880A JP S56116367 A JPS56116367 A JP S56116367A
Authority
JP
Japan
Prior art keywords
line
position information
changing
code
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1945880A
Other languages
Japanese (ja)
Inventor
Toyomichi Yamada
Kenshirou Toyosaki
Hiroshi Ogawa
Masao Hiroyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP1945880A priority Critical patent/JPS56116367A/en
Publication of JPS56116367A publication Critical patent/JPS56116367A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
    • H04N1/41—Bandwidth or redundancy reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)

Abstract

PURPOSE:To reduce processing time by omitting bit processing to a line memory, through the use of a changing point memory storing the changing position information in place of use of a line memory storing original signal, in the conversion from the primary to the secondary dimension code. CONSTITUTION:The primary dimension run length (RL) code inputted is decoded at an RL decoder 22, the changing position is calculated at an a1 register 24 from the RL code, and the changing point position information immediately before the coded line is stored in the previous line and present line changing point memory 26 with the control of a control circuit 25. From this memory 26, required changing point position information is read out with the address of a b1 determining circuit 27 and fed to a pass mode determining circuit 30. Further, as to the changing position information of coded line from the value at the register 24 and the circuit 27, the secondary dimensional redundancy suppression coding is made by using vertical and horizontal code coding circuits 35, 36 and pass mode coding circuit 33, allowing to reduce the processing time.
JP1945880A 1980-02-18 1980-02-18 Code conversion system for facsimile signal Pending JPS56116367A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1945880A JPS56116367A (en) 1980-02-18 1980-02-18 Code conversion system for facsimile signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1945880A JPS56116367A (en) 1980-02-18 1980-02-18 Code conversion system for facsimile signal

Publications (1)

Publication Number Publication Date
JPS56116367A true JPS56116367A (en) 1981-09-12

Family

ID=11999864

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1945880A Pending JPS56116367A (en) 1980-02-18 1980-02-18 Code conversion system for facsimile signal

Country Status (1)

Country Link
JP (1) JPS56116367A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59122282A (en) * 1982-12-27 1984-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Image data compressing system
JPS59126368A (en) * 1983-01-10 1984-07-20 Hitachi Ltd Coder and encoder
JPS60224380A (en) * 1984-04-23 1985-11-08 Nec Corp Facsimile data converting device
JPS6214578A (en) * 1985-07-11 1987-01-23 Nec Corp Code converting system for facsimile signal
JPS62195979A (en) * 1986-02-24 1987-08-29 Mitsubishi Electric Corp Facsimile code converter
JPH0537794A (en) * 1991-08-01 1993-02-12 Matsushita Graphic Commun Syst Inc Coding and decoding method

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59122282A (en) * 1982-12-27 1984-07-14 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Image data compressing system
JPS59126368A (en) * 1983-01-10 1984-07-20 Hitachi Ltd Coder and encoder
JPH0572790B2 (en) * 1983-01-10 1993-10-13 Hitachi Ltd
JPS60224380A (en) * 1984-04-23 1985-11-08 Nec Corp Facsimile data converting device
JPS6214578A (en) * 1985-07-11 1987-01-23 Nec Corp Code converting system for facsimile signal
JPS62195979A (en) * 1986-02-24 1987-08-29 Mitsubishi Electric Corp Facsimile code converter
JPH0537794A (en) * 1991-08-01 1993-02-12 Matsushita Graphic Commun Syst Inc Coding and decoding method

Similar Documents

Publication Publication Date Title
GB1531528A (en) Apparatus for providing valid information for invalid information in unalterable memory means
EP0646932A4 (en) Circuit for decoding variable-length code, and system for decoding variable-length code which uses the circuit.
JPS6451786A (en) High efficiency encoder for picture signal
JPS56116367A (en) Code conversion system for facsimile signal
JPS56116369A (en) Code conversion system for facsimile signal
JPS5644946A (en) Code error correction and detection system
JPS56116368A (en) Code conversion system for facsimile signal
JPS57179998A (en) Memory device having redundancy
JPS5744294A (en) Alternating memory control system
JPS5673974A (en) Compression system of picture data
JPS57201393A (en) Television signal transmitter
JPS5680973A (en) Signal decoding system
JPS5579564A (en) Facsimile signal decoder
JPS5730172A (en) Buffer memory control system
JPS54149437A (en) Error control system of digital memory device
JPS5781650A (en) Data processor
JPS5569858A (en) Error detection and correction system
JPS5617576A (en) Facsimile receiver
JPS55143875A (en) Facsimile signal redundancy suppression coding system
JPS5528564A (en) Memory system
JPS55154643A (en) Error correction system
JPS5762645A (en) Information transfer system
JPS54131831A (en) Memory unit
JPS56117479A (en) Decoding system
JPS5718069A (en) Information storage device