JPS56111932A - High-speed input/output controller - Google Patents

High-speed input/output controller

Info

Publication number
JPS56111932A
JPS56111932A JP1410080A JP1410080A JPS56111932A JP S56111932 A JPS56111932 A JP S56111932A JP 1410080 A JP1410080 A JP 1410080A JP 1410080 A JP1410080 A JP 1410080A JP S56111932 A JPS56111932 A JP S56111932A
Authority
JP
Japan
Prior art keywords
state
register
address
signal
main memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1410080A
Other languages
Japanese (ja)
Other versions
JPS619654B2 (en
Inventor
Mikito Itakura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP1410080A priority Critical patent/JPS56111932A/en
Publication of JPS56111932A publication Critical patent/JPS56111932A/en
Publication of JPS619654B2 publication Critical patent/JPS619654B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Abstract

PURPOSE:To enhance the efficiency of execution of a computer through increasing the speed of response, by securing a correspondence between the external state signal and the main memory address of the computer and delivering the contents of the address to an input/output device in the from of the control signal corresponding to the state. CONSTITUTION:The main memory 2 is connected to the high-speed input/output device 7 via the buses 1a-1c of the microcomputer 1. The external input/output device 10 produces, e.g. 16 types of state signals, and this state signal is converted into the 4-bit signal to be used for the lower 4-bit signal of the register 4. The higher 12 bits of the register 4 is set previously based on a program, and thus the signal of the register 4 can indicate the reference address of the main memory 2. The control signal of the device 10 is stored previously in each address of the memory 2, and as a result the control signal corresponding to the state of the device 10 is read out and supplied to the device 10 via the register 5.
JP1410080A 1980-02-06 1980-02-06 High-speed input/output controller Granted JPS56111932A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1410080A JPS56111932A (en) 1980-02-06 1980-02-06 High-speed input/output controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1410080A JPS56111932A (en) 1980-02-06 1980-02-06 High-speed input/output controller

Publications (2)

Publication Number Publication Date
JPS56111932A true JPS56111932A (en) 1981-09-04
JPS619654B2 JPS619654B2 (en) 1986-03-25

Family

ID=11851690

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1410080A Granted JPS56111932A (en) 1980-02-06 1980-02-06 High-speed input/output controller

Country Status (1)

Country Link
JP (1) JPS56111932A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62192842A (en) * 1986-02-17 1987-08-24 テクトロニツクス・インコ−ポレイテツド Event distributor/connector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62192842A (en) * 1986-02-17 1987-08-24 テクトロニツクス・インコ−ポレイテツド Event distributor/connector

Also Published As

Publication number Publication date
JPS619654B2 (en) 1986-03-25

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