JPS5730020A - Memory address controlling system - Google Patents

Memory address controlling system

Info

Publication number
JPS5730020A
JPS5730020A JP10550280A JP10550280A JPS5730020A JP S5730020 A JPS5730020 A JP S5730020A JP 10550280 A JP10550280 A JP 10550280A JP 10550280 A JP10550280 A JP 10550280A JP S5730020 A JPS5730020 A JP S5730020A
Authority
JP
Japan
Prior art keywords
address
local
register
read out
data processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10550280A
Other languages
Japanese (ja)
Other versions
JPS6022381B2 (en
Inventor
Eizo Fujisaki
Hidefusa Saito
Masahiro Kawakatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55105502A priority Critical patent/JPS6022381B2/en
Publication of JPS5730020A publication Critical patent/JPS5730020A/en
Publication of JPS6022381B2 publication Critical patent/JPS6022381B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0669—Configuration or reconfiguration with decentralised address assignment

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)

Abstract

PURPOSE:To speed up the data processing by setting a subchannel/intramemory head address to a local storage head address register. CONSTITUTION:When a data processing executed at an operation circuit 19 is finished and a job to other input/output device is achieved, first the number of a microprogram controlling the input and output device, that is, the front end number is set to a front.end.number.register 17 to read out a local.storage.head.address. section 18 to the front end number. In this case, when the set number of read out data is in coincidence with the desired number at a comparison circuit, it is set to the upper tank address section U of the local.address.register 16 as it is to read out the required subchannel from a local.storage 15, allowing to achieve data processing.
JP55105502A 1980-07-31 1980-07-31 Memory address control method Expired JPS6022381B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55105502A JPS6022381B2 (en) 1980-07-31 1980-07-31 Memory address control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55105502A JPS6022381B2 (en) 1980-07-31 1980-07-31 Memory address control method

Publications (2)

Publication Number Publication Date
JPS5730020A true JPS5730020A (en) 1982-02-18
JPS6022381B2 JPS6022381B2 (en) 1985-06-01

Family

ID=14409370

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55105502A Expired JPS6022381B2 (en) 1980-07-31 1980-07-31 Memory address control method

Country Status (1)

Country Link
JP (1) JPS6022381B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60138659A (en) * 1983-12-27 1985-07-23 Fujitsu Ltd Channel control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60138659A (en) * 1983-12-27 1985-07-23 Fujitsu Ltd Channel control system

Also Published As

Publication number Publication date
JPS6022381B2 (en) 1985-06-01

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