JPS56110333A - Digital integral network - Google Patents

Digital integral network

Info

Publication number
JPS56110333A
JPS56110333A JP1196880A JP1196880A JPS56110333A JP S56110333 A JPS56110333 A JP S56110333A JP 1196880 A JP1196880 A JP 1196880A JP 1196880 A JP1196880 A JP 1196880A JP S56110333 A JPS56110333 A JP S56110333A
Authority
JP
Japan
Prior art keywords
result
threshold level
passes
output
decrement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1196880A
Other languages
Japanese (ja)
Inventor
Takaaki Osaki
Shiro Kikuchi
Takehiko Tsutsumi
Junji Asakura
Shiro Enami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Oki Electric Industry Co Ltd
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Oki Electric Industry Co Ltd, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP1196880A priority Critical patent/JPS56110333A/en
Publication of JPS56110333A publication Critical patent/JPS56110333A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To increase the noise absorbing characteristics without increasing the delay time of the output response, by securing a coincidence between the delay time of response to the change of output caused by the change of input and the maximum time of duration of the noise contained in the input signal and to be absorbed. CONSTITUTION:An integrating operation is given based on a certain rule to the ditital coded input signal 30, and at the same time an arithmetic circuit is added to give the upper and lower extreme values to the result of operation as well as to secure a continunation of the above-mentioned arithmetic operation following the result of the preceding operation. Then the state of output is inverted at 42 according as the passing direction is toward the increment or decrement when the result of operation passes through the threshold level fixed previously. And in case the result passes through the threshold level in the direction of increment, the result of operation applied to the comparator 42 is set identical 38 to the upper extreme value and in case the result passes through the threshold level in direction of decrement, the result is set identical 44 to the lower extreme value, respectively.
JP1196880A 1980-02-05 1980-02-05 Digital integral network Pending JPS56110333A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1196880A JPS56110333A (en) 1980-02-05 1980-02-05 Digital integral network

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1196880A JPS56110333A (en) 1980-02-05 1980-02-05 Digital integral network

Publications (1)

Publication Number Publication Date
JPS56110333A true JPS56110333A (en) 1981-09-01

Family

ID=11792410

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1196880A Pending JPS56110333A (en) 1980-02-05 1980-02-05 Digital integral network

Country Status (1)

Country Link
JP (1) JPS56110333A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50149259A (en) * 1974-04-25 1975-11-29

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50149259A (en) * 1974-04-25 1975-11-29

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