JPS56103746A - Information processor - Google Patents
Information processorInfo
- Publication number
- JPS56103746A JPS56103746A JP556480A JP556480A JPS56103746A JP S56103746 A JPS56103746 A JP S56103746A JP 556480 A JP556480 A JP 556480A JP 556480 A JP556480 A JP 556480A JP S56103746 A JPS56103746 A JP S56103746A
- Authority
- JP
- Japan
- Prior art keywords
- address
- signal
- stages
- stack level
- register
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
Abstract
PURPOSE:To detect program error of microcomputers different in stack level, by providing the means switching the number of steps of connection of address shut register connected in a plurality of stages and a control means indicating the number of stages of address shunt register connected to this means. CONSTITUTION:The address of a program memory 1 storing information is designated with an program counter 2, and the signal indicating the designated address is tentatively stored to a n-bit bidirectional shift register 10, when PUSH (write-in) signal 20 is output. Further, when a POP (readout) signal 21 is output, the content of the register 10 is temporarily shunted with a stack level switching signal from a terminal 22 via a gate 3 or 7 to n-bit bidirectional shift registers 11, 12. Further, AND gates 4, 6 and an OR gate 5 are controlled with the stack level switching signal from the terminal 22 to indicate the number of stages of stack registers, allowing to detect the program error different from the stack level.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP556480A JPS56103746A (en) | 1980-01-21 | 1980-01-21 | Information processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP556480A JPS56103746A (en) | 1980-01-21 | 1980-01-21 | Information processor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56103746A true JPS56103746A (en) | 1981-08-19 |
JPS6239450B2 JPS6239450B2 (en) | 1987-08-24 |
Family
ID=11614695
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP556480A Granted JPS56103746A (en) | 1980-01-21 | 1980-01-21 | Information processor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56103746A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62247275A (en) * | 1986-03-31 | 1987-10-28 | Ando Electric Co Ltd | Cpu identification circuit for in-circuit emulator |
JPS63316134A (en) * | 1987-06-18 | 1988-12-23 | Toshiba Corp | Semiconductor integrated circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50138749A (en) * | 1974-04-23 | 1975-11-05 |
-
1980
- 1980-01-21 JP JP556480A patent/JPS56103746A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50138749A (en) * | 1974-04-23 | 1975-11-05 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62247275A (en) * | 1986-03-31 | 1987-10-28 | Ando Electric Co Ltd | Cpu identification circuit for in-circuit emulator |
JPS63316134A (en) * | 1987-06-18 | 1988-12-23 | Toshiba Corp | Semiconductor integrated circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6239450B2 (en) | 1987-08-24 |
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