JPS5599859A - Signal processing circuit - Google Patents

Signal processing circuit

Info

Publication number
JPS5599859A
JPS5599859A JP688779A JP688779A JPS5599859A JP S5599859 A JPS5599859 A JP S5599859A JP 688779 A JP688779 A JP 688779A JP 688779 A JP688779 A JP 688779A JP S5599859 A JPS5599859 A JP S5599859A
Authority
JP
Japan
Prior art keywords
amplifier
input terminal
output
level
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP688779A
Other languages
Japanese (ja)
Other versions
JPS6056355B2 (en
Inventor
Nobukazu Hosoya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP54006887A priority Critical patent/JPS6056355B2/en
Publication of JPS5599859A publication Critical patent/JPS5599859A/en
Publication of JPS6056355B2 publication Critical patent/JPS6056355B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H20/00—Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/86—Arrangements characterised by the broadcast information itself
    • H04H20/88—Stereophonic broadcast systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/1646—Circuits adapted for the reception of stereophonic signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04H—BROADCAST COMMUNICATION
    • H04H40/00—Arrangements specially adapted for receiving broadcast information
    • H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
    • H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
    • H04H40/36—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for stereophonic broadcast receiving

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Television Receiver Circuits (AREA)
  • Stereo-Broadcasting Methods (AREA)

Abstract

PURPOSE:To prevent the production of pop sound, by avoiding the variation in DC level of the input terminal of the output circuit in selection control among modes and suppressing the variation in the DC level of input signal with the adjuster provided with the signal input terminal. CONSTITUTION:The first and second differential amplifiers A1, A2 introducing the input signal from the first input terminal 28, third and fourth differential amplifiers amplifiers A2, A4 introducing the input signal from the second input terminal 29, and the fifth differential amplifier A5 at the upper stage of the amplifier A3, are provided. Further, the first output circuit 30 introduces the output of the amplifier A2 and/or A3, second output circuit 31 introduces the output of amplifier A1 and/or A4, the output of the first control circuit 21 individually controls the operation of the amplifiers A1-A4, the operation of the amplifier A5 and the circuit 21 is controlled with the second control circuit 22 to make independent the DC level of each input terminal of the circuits 30 and 31. Further, the variation in DC level is suppressed with the stereo separation adjuster 12 connected to the terminal 29 and only AC signal is changed.
JP54006887A 1979-01-23 1979-01-23 signal processing circuit Expired JPS6056355B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54006887A JPS6056355B2 (en) 1979-01-23 1979-01-23 signal processing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54006887A JPS6056355B2 (en) 1979-01-23 1979-01-23 signal processing circuit

Publications (2)

Publication Number Publication Date
JPS5599859A true JPS5599859A (en) 1980-07-30
JPS6056355B2 JPS6056355B2 (en) 1985-12-10

Family

ID=11650735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54006887A Expired JPS6056355B2 (en) 1979-01-23 1979-01-23 signal processing circuit

Country Status (1)

Country Link
JP (1) JPS6056355B2 (en)

Also Published As

Publication number Publication date
JPS6056355B2 (en) 1985-12-10

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