JPS559490A - Production method of insulating gate type semiconductor device - Google Patents

Production method of insulating gate type semiconductor device

Info

Publication number
JPS559490A
JPS559490A JP8338678A JP8338678A JPS559490A JP S559490 A JPS559490 A JP S559490A JP 8338678 A JP8338678 A JP 8338678A JP 8338678 A JP8338678 A JP 8338678A JP S559490 A JPS559490 A JP S559490A
Authority
JP
Japan
Prior art keywords
area
film
type
resistor
mosic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8338678A
Other languages
Japanese (ja)
Inventor
Takashi Osone
Takashi Hirao
Kazuhiko Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP8338678A priority Critical patent/JPS559490A/en
Publication of JPS559490A publication Critical patent/JPS559490A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To form low power consumption C-MOSIC and resistor-loaded MOSIC with their chips size smaller by constructing IGFET in a semiconductor plate and cover it with an insulating film selectively on which multi crystals semiconductor film-consisted resistor and wiring are formed. CONSTITUTION:A N-type area (12) at a P-type Si plate (11) is formed and the whole area is covered with a 2 phase film (13) of SiO2 and Si3N4 and the film (13) is divided into a multitude by etching with a use of a resist film (14). Then a P-type area (16) in the phate (11) with the area (12) covered with a resist film (15) between divided film (13) is formed to make a thick SiO2 film (17) for disconnection by swelling its cubic content with heat treatment. And a P-type area (18) in the area surrounded by the film (17) with resists (14) and (15) removed is formed to use the area (18) on the area (12) for a transistor Tr1 and the area (18) surrounded by the area (17) for Tr2 and Tr3. Then at these areas are drains 23a and 23b, 25a and 25b, and 26a and 26b formed respectively and on the surface of the specified area are multi-crystals S: resistor 28a-28g and wires 30a-30e established.
JP8338678A 1978-07-07 1978-07-07 Production method of insulating gate type semiconductor device Pending JPS559490A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8338678A JPS559490A (en) 1978-07-07 1978-07-07 Production method of insulating gate type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8338678A JPS559490A (en) 1978-07-07 1978-07-07 Production method of insulating gate type semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP6736681A Division JPS56162838A (en) 1981-05-02 1981-05-02 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS559490A true JPS559490A (en) 1980-01-23

Family

ID=13800973

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8338678A Pending JPS559490A (en) 1978-07-07 1978-07-07 Production method of insulating gate type semiconductor device

Country Status (1)

Country Link
JP (1) JPS559490A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5736844A (en) * 1980-08-15 1982-02-27 Hitachi Ltd Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4973983A (en) * 1972-09-29 1974-07-17
JPS50141982A (en) * 1974-05-02 1975-11-15
JPS53148398A (en) * 1977-05-31 1978-12-23 Texas Instruments Inc Mos ic device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4973983A (en) * 1972-09-29 1974-07-17
JPS50141982A (en) * 1974-05-02 1975-11-15
JPS53148398A (en) * 1977-05-31 1978-12-23 Texas Instruments Inc Mos ic device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5736844A (en) * 1980-08-15 1982-02-27 Hitachi Ltd Semiconductor device

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