JPS559286A - Information processing system - Google Patents

Information processing system

Info

Publication number
JPS559286A
JPS559286A JP8242678A JP8242678A JPS559286A JP S559286 A JPS559286 A JP S559286A JP 8242678 A JP8242678 A JP 8242678A JP 8242678 A JP8242678 A JP 8242678A JP S559286 A JPS559286 A JP S559286A
Authority
JP
Japan
Prior art keywords
processor
assembling
connection
memory
separated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8242678A
Other languages
Japanese (ja)
Inventor
Koichi Okumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP8242678A priority Critical patent/JPS559286A/en
Publication of JPS559286A publication Critical patent/JPS559286A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To increase the operationability and reliability of the processing operation of system, by giving the assembling instruction to the processor separated from the processors under ON-line, and processing the operation such as normal confirmation operation, initial setting operation and assembling operation as a series of operation with the separated processor.
CONSTITUTION: In On-line operation with the processor 5 and the memory 25, when the processor 15 separated is assembled in the sytem, the assembling information is set to the memory 25 via the jumper 53 connected to the processor 5, and the assembling start is instructed to the processor 15 via the connection 51. The processor 15 receiving this instruction starts the normality confirming operation, and if the result is good, predetermined initial set operation is made, required information is picked up from the memory 25 via the connection 56 with the instruction given via the connection 55, the success of assembling is informed to the processor 5 via the connection 52 to increase the operationability and the reliability of the processing operation.
COPYRIGHT: (C)1980,JPO&Japio
JP8242678A 1978-07-05 1978-07-05 Information processing system Pending JPS559286A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8242678A JPS559286A (en) 1978-07-05 1978-07-05 Information processing system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8242678A JPS559286A (en) 1978-07-05 1978-07-05 Information processing system

Publications (1)

Publication Number Publication Date
JPS559286A true JPS559286A (en) 1980-01-23

Family

ID=13774251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8242678A Pending JPS559286A (en) 1978-07-05 1978-07-05 Information processing system

Country Status (1)

Country Link
JP (1) JPS559286A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58188621A (en) * 1982-04-30 1983-11-04 Hitachi Ltd Compression forming device for container
JPS6147232A (en) * 1984-08-14 1986-03-07 Meiwa Sangyo Kk Continuous sheet forming device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58188621A (en) * 1982-04-30 1983-11-04 Hitachi Ltd Compression forming device for container
JPS6147232A (en) * 1984-08-14 1986-03-07 Meiwa Sangyo Kk Continuous sheet forming device

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