JPS5588115A - Input-output subsystem - Google Patents

Input-output subsystem

Info

Publication number
JPS5588115A
JPS5588115A JP16274178A JP16274178A JPS5588115A JP S5588115 A JPS5588115 A JP S5588115A JP 16274178 A JP16274178 A JP 16274178A JP 16274178 A JP16274178 A JP 16274178A JP S5588115 A JPS5588115 A JP S5588115A
Authority
JP
Japan
Prior art keywords
input
command
output unit
microprogram
control memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16274178A
Other languages
Japanese (ja)
Inventor
Kazuo Kumagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16274178A priority Critical patent/JPS5588115A/en
Publication of JPS5588115A publication Critical patent/JPS5588115A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the capacity of the control memory of an input-output device by storing a microprogram controlling the input-output unit in the memroy unit of the input-output unit, and then by supplying the microprogram in the operation of the input-output unit.
CONSTITUTION: Input-output controller 2 receives a command from main-body system unit 1, and decoding part 4 decodes it. On the basis of the decoding result, selection part 6 selects a micro-program in microprogram storage part 5 and sends and stores it in control memory 9 by way of driver 7, bus 13 and receiver 8. After the microprogram corresponding to the command is stored in control memory 9, input-output controller 2 sends an operation command to input-output unit 3. On receiving the operation command, input-output unit 3 reads the microinstruction from control memory 9 to perform a process corresponding to the command.
COPYRIGHT: (C)1980,JPO&Japio
JP16274178A 1978-12-27 1978-12-27 Input-output subsystem Pending JPS5588115A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16274178A JPS5588115A (en) 1978-12-27 1978-12-27 Input-output subsystem

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16274178A JPS5588115A (en) 1978-12-27 1978-12-27 Input-output subsystem

Publications (1)

Publication Number Publication Date
JPS5588115A true JPS5588115A (en) 1980-07-03

Family

ID=15760367

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16274178A Pending JPS5588115A (en) 1978-12-27 1978-12-27 Input-output subsystem

Country Status (1)

Country Link
JP (1) JPS5588115A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60167035A (en) * 1984-02-10 1985-08-30 Hitachi Ltd Input and output controller
JPH0633915U (en) * 1992-10-08 1994-05-06 株式会社ウエルファン pants

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60167035A (en) * 1984-02-10 1985-08-30 Hitachi Ltd Input and output controller
JPH0633915U (en) * 1992-10-08 1994-05-06 株式会社ウエルファン pants

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