JPS5574244A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS5574244A
JPS5574244A JP14806778A JP14806778A JPS5574244A JP S5574244 A JPS5574244 A JP S5574244A JP 14806778 A JP14806778 A JP 14806778A JP 14806778 A JP14806778 A JP 14806778A JP S5574244 A JPS5574244 A JP S5574244A
Authority
JP
Japan
Prior art keywords
output
voltage
lpf
controlled oscillator
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14806778A
Other languages
Japanese (ja)
Inventor
Fusao Ishii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP14806778A priority Critical patent/JPS5574244A/en
Publication of JPS5574244A publication Critical patent/JPS5574244A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/087Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using at least two phase detectors or a frequency and phase detector in the loop

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Video Image Reproduction Devices For Color Tv Systems (AREA)

Abstract

PURPOSE:To enable to avoid color shift and shifted phase of the gate pulse to gate the primary color signals, i.e., the output pulse of PLL circuit, even if the frequency of the index signal is changed through zeroing the stationary phase error. CONSTITUTION:The voltage control oscillator 1 is provided, and the input signal and the output signal of this voltage controlled oscillator 1 are in phase comparison at the phase comparator 2, and the output voltage of the phase comparator 2 is fed to LPF 3 and the output signal of the said input signal and the output signal of the voltage controlled oscillator 1 are in frequency conversion at the frequency detector 6. Further, the output voltage of LPF 3 and that of the frequency detector 6 are given to the voltage controlled oscillator 1 and constitution is made that the stationary phase error can be zero even if the output voltage of LPF 3 is zero.
JP14806778A 1978-11-29 1978-11-29 Pll circuit Pending JPS5574244A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14806778A JPS5574244A (en) 1978-11-29 1978-11-29 Pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14806778A JPS5574244A (en) 1978-11-29 1978-11-29 Pll circuit

Publications (1)

Publication Number Publication Date
JPS5574244A true JPS5574244A (en) 1980-06-04

Family

ID=15444455

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14806778A Pending JPS5574244A (en) 1978-11-29 1978-11-29 Pll circuit

Country Status (1)

Country Link
JP (1) JPS5574244A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49120572A (en) * 1973-03-16 1974-11-18
JPS5126452A (en) * 1974-08-29 1976-03-04 Fujitsu Ltd

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49120572A (en) * 1973-03-16 1974-11-18
JPS5126452A (en) * 1974-08-29 1976-03-04 Fujitsu Ltd

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