JPS5574165A - Hybrid integrated circuit structure - Google Patents
Hybrid integrated circuit structureInfo
- Publication number
- JPS5574165A JPS5574165A JP14649578A JP14649578A JPS5574165A JP S5574165 A JPS5574165 A JP S5574165A JP 14649578 A JP14649578 A JP 14649578A JP 14649578 A JP14649578 A JP 14649578A JP S5574165 A JPS5574165 A JP S5574165A
- Authority
- JP
- Japan
- Prior art keywords
- tips
- auxiliary bumps
- substrate
- bumps
- auxiliary
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Abstract
PURPOSE: To obtain a highly integrated hybrid IC by arranging other tips on the tips previously placed on the base substrate using auxiliary bumps.
CONSTITUTION: Resistance tips 12, circuit parts 14, etc. are placed on the wired substate 11, then capacitive tips 13 are further arranged to overlap the tip 12 by using auxiliary bumps 15. Solder 16 is used to connect the tips, circuit parts, and auxiliary bumps with the substrate through the metallized wiring 17. The auxiliary bumps and the tips are connected with solder also. Conductive paste can be effective. The auxiliary bumps 15 employing the same material as the substrate 11 provides a good resistance against thermal shock. In this manner of three-dimensional arrangement, the most appropriate proportion can be given to hybrid IC structure.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14649578A JPS5574165A (en) | 1978-11-29 | 1978-11-29 | Hybrid integrated circuit structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14649578A JPS5574165A (en) | 1978-11-29 | 1978-11-29 | Hybrid integrated circuit structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5574165A true JPS5574165A (en) | 1980-06-04 |
Family
ID=15408907
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14649578A Pending JPS5574165A (en) | 1978-11-29 | 1978-11-29 | Hybrid integrated circuit structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5574165A (en) |
-
1978
- 1978-11-29 JP JP14649578A patent/JPS5574165A/en active Pending
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