JPS5571320A - Noise elimination unit - Google Patents

Noise elimination unit

Info

Publication number
JPS5571320A
JPS5571320A JP14559278A JP14559278A JPS5571320A JP S5571320 A JPS5571320 A JP S5571320A JP 14559278 A JP14559278 A JP 14559278A JP 14559278 A JP14559278 A JP 14559278A JP S5571320 A JPS5571320 A JP S5571320A
Authority
JP
Japan
Prior art keywords
circuit
output
signals
filter
input terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14559278A
Other languages
Japanese (ja)
Inventor
Toshiharu Ueda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP14559278A priority Critical patent/JPS5571320A/en
Publication of JPS5571320A publication Critical patent/JPS5571320A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold

Abstract

PURPOSE:To eliminate noise without generating a time delay between the input and the output by supplying simultaneously regular signals and signals, which are obtained by delaying them by a prescribed time, as the input of a logical operation circuit. CONSTITUTION:Digital signals are supplied to signal input terminal 1, and these signals are supplied to not only one input terminal 8 of AND circuit 7 but also the other input terminal of AND circuit 7 through high-band stop filter 10. High-band stop filter 10 consists of resistance 13 and capacitor 14 and eliminates the high- frequency noise of digital signals. When the output of filter 10 exceeds the threshold level of AND circuit 7, AND is operated in AND circuit 7. No AND output is generated for the pulse noise having a period smaller than time t1 when the output of filter 10 reaches the threshold level.
JP14559278A 1978-11-24 1978-11-24 Noise elimination unit Pending JPS5571320A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14559278A JPS5571320A (en) 1978-11-24 1978-11-24 Noise elimination unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14559278A JPS5571320A (en) 1978-11-24 1978-11-24 Noise elimination unit

Publications (1)

Publication Number Publication Date
JPS5571320A true JPS5571320A (en) 1980-05-29

Family

ID=15388642

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14559278A Pending JPS5571320A (en) 1978-11-24 1978-11-24 Noise elimination unit

Country Status (1)

Country Link
JP (1) JPS5571320A (en)

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