JPS5566147A - Frequency synthesizer - Google Patents

Frequency synthesizer

Info

Publication number
JPS5566147A
JPS5566147A JP13878778A JP13878778A JPS5566147A JP S5566147 A JPS5566147 A JP S5566147A JP 13878778 A JP13878778 A JP 13878778A JP 13878778 A JP13878778 A JP 13878778A JP S5566147 A JPS5566147 A JP S5566147A
Authority
JP
Japan
Prior art keywords
output
frequency
oscillator
counter
necessary
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13878778A
Other languages
Japanese (ja)
Inventor
Hiroshi Iida
Akemasa Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sansui Electric Co Ltd
Original Assignee
Sansui Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sansui Electric Co Ltd filed Critical Sansui Electric Co Ltd
Priority to JP13878778A priority Critical patent/JPS5566147A/en
Publication of JPS5566147A publication Critical patent/JPS5566147A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/183—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number
    • H03L7/185—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between fixed numbers or the frequency divider dividing by a fixed number using a mixer in the loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

Landscapes

  • Superheterodyne Receivers (AREA)

Abstract

PURPOSE:To secure selection and output of the necessary and steady frequency by counting the output frequency of the variable frequency oscillator via the signal which gives the necessary gate time and then giving the count value as the division ratio of the programmable divider. CONSTITUTION:The output of voltage control oscillator 1 is divided by programmable divider 2, and the phase comparison is performed at phase comparator 4 between the division output and the reference oscillation output of reference oscillator 3. Then the output of comparator 4 is fed back to oscillator 1 via the LPF and DC amplifier 5 to give control to the frequency of oscillator 1. Frequency counter 7 which counts the output frequency of variable frequency oscillator 6 is installed to such circuit along with latch circuit 9 which latches the output of counter 7. Then the count value of counter 7 is controlled by the timing signal of timing circuit 8 which uses the reference oscillation output of oscillator 3 as the input, and the output of counter 7 is applied as the division ratio of divider 2. Thus the frequency of oscillator 6 is altered, and the frequency of oscillator 1 is selected to the necessary frequency.
JP13878778A 1978-11-13 1978-11-13 Frequency synthesizer Pending JPS5566147A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13878778A JPS5566147A (en) 1978-11-13 1978-11-13 Frequency synthesizer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13878778A JPS5566147A (en) 1978-11-13 1978-11-13 Frequency synthesizer

Publications (1)

Publication Number Publication Date
JPS5566147A true JPS5566147A (en) 1980-05-19

Family

ID=15230192

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13878778A Pending JPS5566147A (en) 1978-11-13 1978-11-13 Frequency synthesizer

Country Status (1)

Country Link
JP (1) JPS5566147A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5249711A (en) * 1975-10-18 1977-04-21 Trio Kenwood Corp Synthesizer tuner

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5249711A (en) * 1975-10-18 1977-04-21 Trio Kenwood Corp Synthesizer tuner

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