JPS5636234A - Frequency following type voltage control oscillating unit - Google Patents
Frequency following type voltage control oscillating unitInfo
- Publication number
- JPS5636234A JPS5636234A JP11188679A JP11188679A JPS5636234A JP S5636234 A JPS5636234 A JP S5636234A JP 11188679 A JP11188679 A JP 11188679A JP 11188679 A JP11188679 A JP 11188679A JP S5636234 A JPS5636234 A JP S5636234A
- Authority
- JP
- Japan
- Prior art keywords
- vco
- circuit
- counter
- frequency
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012544 monitoring process Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/181—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a numerical count result being used for locking the loop, the counter counting during fixed time intervals
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To obtain a set frequency with a high precision in a short sweep time, by monitoring the output frequency of a VCO and by controlling the input voltage of the VCO so that the output frequency may agree with the set frequency. CONSTITUTION:By lock CK1 from clock pulse generating circuit 2, gate circuit 3 applies the output signal of VCO 1 to counter 4. By clock CK3 from circuit 2, contents of counter 4 are held in latch circuit 5. Contents of latch circuit 5 and set frequency f2 are compared with each other by comparing circuit 6, and the output is applied to gates 7 and 8 according to the comparison result. By clock CK4 from circuit 2, gates 7 and 8 are turned on to apply their outputs to up/down counter 9, and counter 9 is counted up or down according to the signal. The output of counter 9 becomes an analogue signal by D/A converter 10 and is applied to VCO 1 to cause the frequency of the VCO to approach the set frequency.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11188679A JPS5636234A (en) | 1979-08-31 | 1979-08-31 | Frequency following type voltage control oscillating unit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP11188679A JPS5636234A (en) | 1979-08-31 | 1979-08-31 | Frequency following type voltage control oscillating unit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5636234A true JPS5636234A (en) | 1981-04-09 |
Family
ID=14572603
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP11188679A Pending JPS5636234A (en) | 1979-08-31 | 1979-08-31 | Frequency following type voltage control oscillating unit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5636234A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5847331A (en) * | 1981-09-04 | 1983-03-19 | テクトロニクス・インコ−ポレイテツド | Signal generator |
JPS58189631U (en) * | 1982-06-11 | 1983-12-16 | アイコム株式会社 | Digital AFC circuit |
JPS59207746A (en) * | 1983-04-26 | 1984-11-24 | ドイチエ・トムソン−ブラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング | Circuit device for generating stable fixed frequency |
JPS63211818A (en) * | 1987-02-27 | 1988-09-02 | Toshiba Corp | Digital phase synchronizing controller |
JPS6432537A (en) * | 1987-07-28 | 1989-02-02 | Fujitsu Ten Ltd | Pll receiver |
JPS6486715A (en) * | 1987-09-29 | 1989-03-31 | Toshiba Corp | Automatic frequency control circuit |
EP0443221A1 (en) * | 1990-02-14 | 1991-08-28 | Atlas Powder Company | Method and apparatus for a calibrated electronic timing circuit |
-
1979
- 1979-08-31 JP JP11188679A patent/JPS5636234A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5847331A (en) * | 1981-09-04 | 1983-03-19 | テクトロニクス・インコ−ポレイテツド | Signal generator |
JPS58189631U (en) * | 1982-06-11 | 1983-12-16 | アイコム株式会社 | Digital AFC circuit |
JPS59207746A (en) * | 1983-04-26 | 1984-11-24 | ドイチエ・トムソン−ブラント・ゲゼルシヤフト・ミツト・ベシユレンクテル・ハフツング | Circuit device for generating stable fixed frequency |
JPS63211818A (en) * | 1987-02-27 | 1988-09-02 | Toshiba Corp | Digital phase synchronizing controller |
JPS6432537A (en) * | 1987-07-28 | 1989-02-02 | Fujitsu Ten Ltd | Pll receiver |
JPS6486715A (en) * | 1987-09-29 | 1989-03-31 | Toshiba Corp | Automatic frequency control circuit |
EP0443221A1 (en) * | 1990-02-14 | 1991-08-28 | Atlas Powder Company | Method and apparatus for a calibrated electronic timing circuit |
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