JPS5553722A - Priority control system - Google Patents
Priority control systemInfo
- Publication number
- JPS5553722A JPS5553722A JP12758478A JP12758478A JPS5553722A JP S5553722 A JPS5553722 A JP S5553722A JP 12758478 A JP12758478 A JP 12758478A JP 12758478 A JP12758478 A JP 12758478A JP S5553722 A JPS5553722 A JP S5553722A
- Authority
- JP
- Japan
- Prior art keywords
- groups
- priority
- bus
- peripheral
- unit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bus Control (AREA)
- Small-Scale Networks (AREA)
Abstract
PURPOSE: To shorten the queuing time to the peripheral unit featuring a low priority by dividing plural number of peripheral units into several groups and then setting up the priority between the peripheral units within the groups as well as between the groups.
CONSTITUTION: Peripheral units 103, 1032W1034 plus 1035 and 1036 form 1st, 2nd and 3rd groups G1, G2 and G3 respectively. And secondary priority control parts 1041 and 1042 are provided in correspondence to G2 and G3 including several peripheral units, and furthermore primary priority control part 105 is provided to give the using permission of input/output bus 102 to the unit having the highest priority for the using request of bus 102 which is sent out from parts 1041 and 1042 plus unit 1031. Accordingly, if G2 or G3 is given the using permission of bus 102, control parts 1041 and 1042 corresponding to those groups give the using permission of bus 102 to peripheral unit 103i having the highest priority among units 1032 and 1034 which are under the control of the control parts.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12758478A JPS5553722A (en) | 1978-10-17 | 1978-10-17 | Priority control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12758478A JPS5553722A (en) | 1978-10-17 | 1978-10-17 | Priority control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5553722A true JPS5553722A (en) | 1980-04-19 |
Family
ID=14963674
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12758478A Pending JPS5553722A (en) | 1978-10-17 | 1978-10-17 | Priority control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5553722A (en) |
Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58139255A (en) * | 1981-11-13 | 1983-08-18 | イング・チイ・オリベツチ・アンド・チイ・エス・ピ−・ア | Data processing system |
JPS59231966A (en) * | 1983-06-14 | 1984-12-26 | Tamura Electric Works Ltd | Processing control system of public telephone set |
JPS6016756A (en) * | 1984-05-31 | 1985-01-28 | Tamura Electric Works Ltd | Processing control system of device |
JPS61182158A (en) * | 1985-02-07 | 1986-08-14 | Fujitsu Ltd | Common bus occupying system |
JPH0496165A (en) * | 1990-08-08 | 1992-03-27 | Matsushita Electric Ind Co Ltd | System bus arbitrator |
JPH05128056A (en) * | 1991-10-30 | 1993-05-25 | Oki Electric Ind Co Ltd | Priority encoding circuit |
US5805836A (en) * | 1996-12-10 | 1998-09-08 | International Business Machines Corporation | Method and apparatus for equalizing grants of a data bus to primary and secondary devices |
US6954844B2 (en) | 1991-07-08 | 2005-10-11 | Seiko Epson Corporation | Microprocessor architecture capable of supporting multiple heterogeneous processors |
JP2008046997A (en) * | 2006-08-18 | 2008-02-28 | Fujitsu Ltd | Arbitration circuit, crossbar, request selection method, and information processor |
JP2014035549A (en) * | 2012-08-07 | 2014-02-24 | Ricoh Co Ltd | Bus control device, image processing apparatus, and bus control method |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50159629A (en) * | 1974-06-13 | 1975-12-24 | ||
JPS5210642A (en) * | 1975-06-23 | 1977-01-27 | Nec Corp | Offering analysis device |
-
1978
- 1978-10-17 JP JP12758478A patent/JPS5553722A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50159629A (en) * | 1974-06-13 | 1975-12-24 | ||
JPS5210642A (en) * | 1975-06-23 | 1977-01-27 | Nec Corp | Offering analysis device |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58139255A (en) * | 1981-11-13 | 1983-08-18 | イング・チイ・オリベツチ・アンド・チイ・エス・ピ−・ア | Data processing system |
JPS59231966A (en) * | 1983-06-14 | 1984-12-26 | Tamura Electric Works Ltd | Processing control system of public telephone set |
JPH0472429B2 (en) * | 1983-06-14 | 1992-11-18 | Tamura Electric Works Ltd | |
JPS6016756A (en) * | 1984-05-31 | 1985-01-28 | Tamura Electric Works Ltd | Processing control system of device |
JPS61182158A (en) * | 1985-02-07 | 1986-08-14 | Fujitsu Ltd | Common bus occupying system |
JPH0496165A (en) * | 1990-08-08 | 1992-03-27 | Matsushita Electric Ind Co Ltd | System bus arbitrator |
US6954844B2 (en) | 1991-07-08 | 2005-10-11 | Seiko Epson Corporation | Microprocessor architecture capable of supporting multiple heterogeneous processors |
US7657712B2 (en) | 1991-07-08 | 2010-02-02 | Seiko Epson Corporation | Microprocessor architecture capable of supporting multiple heterogeneous processors |
JPH05128056A (en) * | 1991-10-30 | 1993-05-25 | Oki Electric Ind Co Ltd | Priority encoding circuit |
US5805836A (en) * | 1996-12-10 | 1998-09-08 | International Business Machines Corporation | Method and apparatus for equalizing grants of a data bus to primary and secondary devices |
JP2008046997A (en) * | 2006-08-18 | 2008-02-28 | Fujitsu Ltd | Arbitration circuit, crossbar, request selection method, and information processor |
JP2014035549A (en) * | 2012-08-07 | 2014-02-24 | Ricoh Co Ltd | Bus control device, image processing apparatus, and bus control method |
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