JPS5552661A - Phase demodulator circuit - Google Patents

Phase demodulator circuit

Info

Publication number
JPS5552661A
JPS5552661A JP12554678A JP12554678A JPS5552661A JP S5552661 A JPS5552661 A JP S5552661A JP 12554678 A JP12554678 A JP 12554678A JP 12554678 A JP12554678 A JP 12554678A JP S5552661 A JPS5552661 A JP S5552661A
Authority
JP
Japan
Prior art keywords
phase
circuit
detection
branched
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12554678A
Other languages
Japanese (ja)
Inventor
Iwao Eguchi
Tadao Shimamura
Yukio Takimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12554678A priority Critical patent/JPS5552661A/en
Publication of JPS5552661A publication Critical patent/JPS5552661A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/18Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22Demodulator circuits; Receiver circuits
    • H04L27/227Demodulator circuits; Receiver circuits using coherent demodulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To obtain a delay detection-system phase demodulator circuit which is stable against temperatures. CONSTITUTION:The input from terminal 101 is branched by 1, and one is branched furthermore by 2, and the other is delayed 4 by 1 bit and is branched 3 through voltage control phase shifter circuit 10. One is subjected to phase detection 6, and the other is subjected to phase detection 7 after 90 deg. phase shift 5 to output signals corresponding to phase difference, and these signals are discriminated 8, 9 to demodulate a prescribed digital signal string. Now, if phase phi exists between inputs of branching circuits 2 and 3, signals A and B based on this phase and signals C and D from discrimination circuits 8 and 9 are inputted to detection circuit 11 to generate a positive or negative voltage according to the polarity of phase slippage, and circuit 10 is controlled by this voltage to correct phase shift fluctuation of delay circuit 4. Thus, it is unnecessary that a considerably severe stability against temperatures is required for the delay circuit.
JP12554678A 1978-10-11 1978-10-11 Phase demodulator circuit Pending JPS5552661A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12554678A JPS5552661A (en) 1978-10-11 1978-10-11 Phase demodulator circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12554678A JPS5552661A (en) 1978-10-11 1978-10-11 Phase demodulator circuit

Publications (1)

Publication Number Publication Date
JPS5552661A true JPS5552661A (en) 1980-04-17

Family

ID=14912866

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12554678A Pending JPS5552661A (en) 1978-10-11 1978-10-11 Phase demodulator circuit

Country Status (1)

Country Link
JP (1) JPS5552661A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161555A (en) * 1982-03-19 1983-09-26 Fujitsu Ltd Delayed phase detecting circuit
JPS6093862A (en) * 1983-10-27 1985-05-25 Nec Corp Delay detector

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58161555A (en) * 1982-03-19 1983-09-26 Fujitsu Ltd Delayed phase detecting circuit
JPS6093862A (en) * 1983-10-27 1985-05-25 Nec Corp Delay detector

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