JPS5552625A - Charge transfer type transversal filter - Google Patents

Charge transfer type transversal filter

Info

Publication number
JPS5552625A
JPS5552625A JP12575578A JP12575578A JPS5552625A JP S5552625 A JPS5552625 A JP S5552625A JP 12575578 A JP12575578 A JP 12575578A JP 12575578 A JP12575578 A JP 12575578A JP S5552625 A JPS5552625 A JP S5552625A
Authority
JP
Japan
Prior art keywords
circuits
transfer
signals
charge transfer
delay
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12575578A
Other languages
Japanese (ja)
Inventor
Seiya Shida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12575578A priority Critical patent/JPS5552625A/en
Publication of JPS5552625A publication Critical patent/JPS5552625A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H15/00Transversal filters

Abstract

PURPOSE:To shorten transfer channel length by arranging CTDs (charge transfer devices) into two parallel lines and giving input signal strings alternately to perform storage and transfer by the half clock frequency and adding read and weighted signals to obtain an output. CONSTITUTION:Two lines of delay circuits where delay elements D' dependent upon CTDs are cascaded are provided, and signals at connection points of respective elements D' are led to weighting circuits hO-hN, and their outputs are given to adder circuits SIGMA(1) and SIGMA(2). Selector switch SW operates synchronously with the clock period of input signals and gives input pulses to inputs of both delay circuits alternately. Both delay circuits are controlled by clocks twice as long as the clock period, thus performing storage and transfer.
JP12575578A 1978-10-13 1978-10-13 Charge transfer type transversal filter Pending JPS5552625A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12575578A JPS5552625A (en) 1978-10-13 1978-10-13 Charge transfer type transversal filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12575578A JPS5552625A (en) 1978-10-13 1978-10-13 Charge transfer type transversal filter

Publications (1)

Publication Number Publication Date
JPS5552625A true JPS5552625A (en) 1980-04-17

Family

ID=14918003

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12575578A Pending JPS5552625A (en) 1978-10-13 1978-10-13 Charge transfer type transversal filter

Country Status (1)

Country Link
JP (1) JPS5552625A (en)

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