JPS5542314A - Automatic memory restoration circuit - Google Patents

Automatic memory restoration circuit

Info

Publication number
JPS5542314A
JPS5542314A JP11360378A JP11360378A JPS5542314A JP S5542314 A JPS5542314 A JP S5542314A JP 11360378 A JP11360378 A JP 11360378A JP 11360378 A JP11360378 A JP 11360378A JP S5542314 A JPS5542314 A JP S5542314A
Authority
JP
Japan
Prior art keywords
contents
address
memory
read
cyclic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11360378A
Other languages
Japanese (ja)
Other versions
JPS6127782B2 (en
Inventor
Haruki Taguchi
Toshiaki Yamamoto
Makoto Amauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11360378A priority Critical patent/JPS5542314A/en
Publication of JPS5542314A publication Critical patent/JPS5542314A/en
Publication of JPS6127782B2 publication Critical patent/JPS6127782B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Retry When Errors Occur (AREA)
  • Debugging And Monitoring (AREA)

Abstract

PURPOSE: To make it possible to restore automatically the contents of a cyclic memory where the same data have been written at constant-address intervals, by utilizing that the same information resides at even intervals.
CONSTITUTION: When parity check circuit 4 detects abnormality in a l-address read from cyclic memory 1, FF201 is set and automatic restoration circuit 20 is actuated. Then, the contents at each following address with the same contents are collated by comparing and this comparative collation is continued as long as one cyclic period until the l-address read. As a result, when the contents are all equal at each even address interval, the contents are sent to memory 1 through data write gate 7 to restore the contents at the l-address. In this way, the memory contents can automatically be restored in an abnormal memory read.
COPYRIGHT: (C)1980,JPO&Japio
JP11360378A 1978-09-18 1978-09-18 Automatic memory restoration circuit Granted JPS5542314A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11360378A JPS5542314A (en) 1978-09-18 1978-09-18 Automatic memory restoration circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11360378A JPS5542314A (en) 1978-09-18 1978-09-18 Automatic memory restoration circuit

Publications (2)

Publication Number Publication Date
JPS5542314A true JPS5542314A (en) 1980-03-25
JPS6127782B2 JPS6127782B2 (en) 1986-06-27

Family

ID=14616393

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11360378A Granted JPS5542314A (en) 1978-09-18 1978-09-18 Automatic memory restoration circuit

Country Status (1)

Country Link
JP (1) JPS5542314A (en)

Also Published As

Publication number Publication date
JPS6127782B2 (en) 1986-06-27

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