JPS554138A - Still picture receiver circuit - Google Patents

Still picture receiver circuit

Info

Publication number
JPS554138A
JPS554138A JP7694778A JP7694778A JPS554138A JP S554138 A JPS554138 A JP S554138A JP 7694778 A JP7694778 A JP 7694778A JP 7694778 A JP7694778 A JP 7694778A JP S554138 A JPS554138 A JP S554138A
Authority
JP
Japan
Prior art keywords
signal
still picture
outputs
information
output terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7694778A
Other languages
Japanese (ja)
Inventor
Akira Matsushita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7694778A priority Critical patent/JPS554138A/en
Publication of JPS554138A publication Critical patent/JPS554138A/en
Pending legal-status Critical Current

Links

Landscapes

  • Television Systems (AREA)

Abstract

PURPOSE: To regenerate a still picture signal superposed on a TV broadcast signal by temporarily storing a transmitted multiple information signal in RAM and then by reading it out.
CONSTITUTION: To write a still picture signal to RAM6, switches SW1 and SW2 are connected to the terminal T2 side. Bit counter 5, reset by a horizontal synchronizing signal from synchronous separator circuit 3, outputs a signal prescribing the horizontal direction of a regenerated picture in a period of a horizontal synchronizing signal. Line counter 7, reset by a vertical synchronizing signal, counts up the horizontal synchronizing signal and generates it output at output terminal 73. Next, a still picture information sampling pulse appearing at output terminal 74 is supplied to still picture sampling circuit 4, which outputs still picture information from output terminal 41. By this information a line code signal is extracted by control signal detection circuit 9 and a still picture signal is also extracted by still picture sampling circuit 8; the both are written to addresses of RAM 6 determined by the outputs of counters 5 and 7. As for read operation, switches SW1 and SW2 are connected to the terminal T2 side and a picture is reproduced on cathode-ray tube 11 at addresses determined by the outputs of counters 5 and 7.
COPYRIGHT: (C)1980,JPO&Japio
JP7694778A 1978-06-27 1978-06-27 Still picture receiver circuit Pending JPS554138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7694778A JPS554138A (en) 1978-06-27 1978-06-27 Still picture receiver circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7694778A JPS554138A (en) 1978-06-27 1978-06-27 Still picture receiver circuit

Publications (1)

Publication Number Publication Date
JPS554138A true JPS554138A (en) 1980-01-12

Family

ID=13619945

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7694778A Pending JPS554138A (en) 1978-06-27 1978-06-27 Still picture receiver circuit

Country Status (1)

Country Link
JP (1) JPS554138A (en)

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