JPS5541081A - Chrominance signal circuit of pal color television receiver - Google Patents

Chrominance signal circuit of pal color television receiver

Info

Publication number
JPS5541081A
JPS5541081A JP11550978A JP11550978A JPS5541081A JP S5541081 A JPS5541081 A JP S5541081A JP 11550978 A JP11550978 A JP 11550978A JP 11550978 A JP11550978 A JP 11550978A JP S5541081 A JPS5541081 A JP S5541081A
Authority
JP
Japan
Prior art keywords
circuit
output
phase
detector
inversion mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11550978A
Other languages
Japanese (ja)
Inventor
Hiroshi Inoue
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP11550978A priority Critical patent/JPS5541081A/en
Publication of JPS5541081A publication Critical patent/JPS5541081A/en
Pending legal-status Critical Current

Links

Landscapes

  • Processing Of Color Television Signals (AREA)

Abstract

PURPOSE: To eliminate the lateral noise at weak electric field reception, by controlling the FF of ID (identification) circuit making correct the inversion mode of PAL switch with the output of the differentiation circuit smoothing the output of phase detection and improving the characteristics against noise.
CONSTITUTION: The circuit provides the ID circuit 20 making accurate the inversion mode of the PAL switch 17 and the burst gate circuit 21 picking up the burst signal every other one line with the pulse of 1/2 horizontal frequency from FF 19 through the connection of the burst gate 10. Further, the phase shifter 22 shifting the ouput of the subcarrier oscillator 12 by +45° and the phase detector 23 phase- detecting the burst signal of the gate circuit 21 and the subcarrier from the phase shifter 22, are provided, and the output of the detector 23 is added to the integration circuit 24, the output of the detector 23 is fed to the FF circuit 19 with smoothing, the noise characteristics is improved with normal inversion mode, and lateral noise caused at weak electric field reception is eliminated.
COPYRIGHT: (C)1980,JPO&Japio
JP11550978A 1978-09-18 1978-09-18 Chrominance signal circuit of pal color television receiver Pending JPS5541081A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11550978A JPS5541081A (en) 1978-09-18 1978-09-18 Chrominance signal circuit of pal color television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11550978A JPS5541081A (en) 1978-09-18 1978-09-18 Chrominance signal circuit of pal color television receiver

Publications (1)

Publication Number Publication Date
JPS5541081A true JPS5541081A (en) 1980-03-22

Family

ID=14664273

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11550978A Pending JPS5541081A (en) 1978-09-18 1978-09-18 Chrominance signal circuit of pal color television receiver

Country Status (1)

Country Link
JP (1) JPS5541081A (en)

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