JPS5541007A - Composite video signal generation circuit - Google Patents

Composite video signal generation circuit

Info

Publication number
JPS5541007A
JPS5541007A JP11359978A JP11359978A JPS5541007A JP S5541007 A JPS5541007 A JP S5541007A JP 11359978 A JP11359978 A JP 11359978A JP 11359978 A JP11359978 A JP 11359978A JP S5541007 A JPS5541007 A JP S5541007A
Authority
JP
Japan
Prior art keywords
video signal
composite video
generation circuit
signal generation
resistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11359978A
Other languages
Japanese (ja)
Other versions
JPS6342473B2 (en
Inventor
Katsuzo Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP11359978A priority Critical patent/JPS5541007A/en
Publication of JPS5541007A publication Critical patent/JPS5541007A/en
Publication of JPS6342473B2 publication Critical patent/JPS6342473B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Details Of Television Systems (AREA)
  • Digital Computer Display Output (AREA)
  • Synchronizing For Television (AREA)

Abstract

PURPOSE: To realize the simple composite video signal generation circuit which can continuously change the voltage at the synchronization section, bu constituting the circuit mainly with transistors and resistors.
CONSTITUTION: Each collector of the two transistors Q1 and Q2 at least is connected to the power supply via the resistors R1 and R2, and the emitters are commonly connected. Video signal is connected to the base of the first transistor Q1 and synchronizing signal is fed to the base of the second transistor Q2, to pick up composite video signal from the common connection section of the emitter. Further, by changing the resistors R1 and R2, the voltage level of the composite video signal being the output signal can continuously be changed. Accordingly, the composite video signal generation circuit can simply be constituted in less number of components.
COPYRIGHT: (C)1980,JPO&Japio
JP11359978A 1978-09-18 1978-09-18 Composite video signal generation circuit Granted JPS5541007A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11359978A JPS5541007A (en) 1978-09-18 1978-09-18 Composite video signal generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11359978A JPS5541007A (en) 1978-09-18 1978-09-18 Composite video signal generation circuit

Publications (2)

Publication Number Publication Date
JPS5541007A true JPS5541007A (en) 1980-03-22
JPS6342473B2 JPS6342473B2 (en) 1988-08-23

Family

ID=14616287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11359978A Granted JPS5541007A (en) 1978-09-18 1978-09-18 Composite video signal generation circuit

Country Status (1)

Country Link
JP (1) JPS5541007A (en)

Also Published As

Publication number Publication date
JPS6342473B2 (en) 1988-08-23

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