JPS5530831A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5530831A
JPS5530831A JP10358878A JP10358878A JPS5530831A JP S5530831 A JPS5530831 A JP S5530831A JP 10358878 A JP10358878 A JP 10358878A JP 10358878 A JP10358878 A JP 10358878A JP S5530831 A JPS5530831 A JP S5530831A
Authority
JP
Japan
Prior art keywords
substrate
ions
type
resistor
obtaining
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10358878A
Other languages
Japanese (ja)
Inventor
Takashi Sato
Teruo Sakurai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10358878A priority Critical patent/JPS5530831A/en
Publication of JPS5530831A publication Critical patent/JPS5530831A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To introduce simpler processes by making a device in which a PN junction diode and a resistor are connected in series, and by supplying ions for obtaining amorphousness and then recrystalizing by means of heat treatment.
CONSTITUTION: "As" ions are supplied into a certain depth to a P type si substrate 1 with an accelerating voltage of 400keV and an amount of dosage of 5×1015cm-2 for obtaining an amorphous body. Then the substrate is heat treated at 500C for 160 minutes to recrystalize the amorphous layer 2 that has high density with the ions and is 2,000∼4,000Å deep from the surface of the substrate to form a N+ type active layer thus forming a PN junction. Then an inert amorphous layer 3 is etched into a cylindrical form with a diameter of 300μ to obtain a resistor with a resistance of 3MΩ. Type of impurity to be used, density, heat treatment conditions, shape and size can be altered.
COPYRIGHT: (C)1980,JPO&Japio
JP10358878A 1978-08-25 1978-08-25 Semiconductor device Pending JPS5530831A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10358878A JPS5530831A (en) 1978-08-25 1978-08-25 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10358878A JPS5530831A (en) 1978-08-25 1978-08-25 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS5530831A true JPS5530831A (en) 1980-03-04

Family

ID=14357922

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10358878A Pending JPS5530831A (en) 1978-08-25 1978-08-25 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5530831A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59168665A (en) * 1983-03-07 1984-09-22 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Semiconductor memory device and method of producing same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59168665A (en) * 1983-03-07 1984-09-22 フィリップス エレクトロニクス ネムローゼ フェンノートシャップ Semiconductor memory device and method of producing same

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