JPS5526651A - Bonding method of semiconductor substrate - Google Patents

Bonding method of semiconductor substrate

Info

Publication number
JPS5526651A
JPS5526651A JP9923478A JP9923478A JPS5526651A JP S5526651 A JPS5526651 A JP S5526651A JP 9923478 A JP9923478 A JP 9923478A JP 9923478 A JP9923478 A JP 9923478A JP S5526651 A JPS5526651 A JP S5526651A
Authority
JP
Japan
Prior art keywords
transistor
heating rack
heat generation
self
header
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9923478A
Other languages
Japanese (ja)
Inventor
Kenichi Tateno
Hiroyuki Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP9923478A priority Critical patent/JPS5526651A/en
Publication of JPS5526651A publication Critical patent/JPS5526651A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE: To prevent an occurrence of a cavity with a uniform solution by melting brazing material inserted between a transistor and a metallic head by a self-heat generation due to the conduction of the transistor and a heat generation of a heating rack in firmly fixing them.
CONSTITUTION: A metallic header 3 is mounted on a heating rack 4 and a soldering material such as a lead alloy or tin alloy is further mounted thereon. Subsequently, a transistor 1 to be fixed is mounted thereon further and conductive contactors 8 and 9 for a conduction source are contacted with a base electrode 5 and an emitter electrode 6 provided in the transistor 1. Next, the temperature of the brazing material 2 is increased up to a value that it would not be dissolved by setting the heating rack 4 at 100 to 150°C and a forward current is applied by operating a source 7 until the tempereture of a substrate of the transistor 1 reaches 100°C. According to such a process, the ironic material 2 is molten by a self-heat generation due to the heating rack 4 and transistor 1 to firmly fix the transistor 1 and the header 3.
COPYRIGHT: (C)1980,JPO&Japio
JP9923478A 1978-08-14 1978-08-14 Bonding method of semiconductor substrate Pending JPS5526651A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9923478A JPS5526651A (en) 1978-08-14 1978-08-14 Bonding method of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9923478A JPS5526651A (en) 1978-08-14 1978-08-14 Bonding method of semiconductor substrate

Publications (1)

Publication Number Publication Date
JPS5526651A true JPS5526651A (en) 1980-02-26

Family

ID=14241980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9923478A Pending JPS5526651A (en) 1978-08-14 1978-08-14 Bonding method of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPS5526651A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506139A (en) * 1983-04-04 1985-03-19 Honeywell Inc. Circuit chip

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4948263A (en) * 1972-09-14 1974-05-10
JPS5385160A (en) * 1976-12-31 1978-07-27 Fujitsu Ltd Production of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4948263A (en) * 1972-09-14 1974-05-10
JPS5385160A (en) * 1976-12-31 1978-07-27 Fujitsu Ltd Production of semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4506139A (en) * 1983-04-04 1985-03-19 Honeywell Inc. Circuit chip

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