JPS551767A - Profile compensator - Google Patents

Abstract

PURPOSE: To simplify the circuit constitution, by forming 1H delay line through the drive of n sets of analog registers of low speed with N phases and by taking correlativity to obtain the profile emphasis signal only for one phase.

CONSTITUTION: The signal g inputted 31 is sampled with the period τ₁ of three phase pulses ϕ₁ to ϕ₃ to hold i₁ to i₃. i₁ to i₃ are fed to the registers 33 to 35 of n stages, are shifted every τ₁ and delayed by 1H at the n-th stage. The 1H delay signal of the register 33 is fed to the register 36 to obtain 2H delay signal. A half of this and a half the output 32 are added, the output of the adder 38 is subtracted 39 from the 1H delay signal of the register 33 to obtain vertical profile emphasis signal. The three phase signal delayed by 1H is converted 37 into original time series and it is returned to the analog signal delayed by 1H from the original video signal at LPF 40. The addition of the vertical profile emphasis signal outputs 42 the signal compensated for the profile from the output of the subtractor 39. Thus, the picture can be sharpened with a simple circuit constitution.

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