JPS55154833A - Pll circuit - Google Patents

Pll circuit

Info

Publication number
JPS55154833A
JPS55154833A JP6352679A JP6352679A JPS55154833A JP S55154833 A JPS55154833 A JP S55154833A JP 6352679 A JP6352679 A JP 6352679A JP 6352679 A JP6352679 A JP 6352679A JP S55154833 A JPS55154833 A JP S55154833A
Authority
JP
Japan
Prior art keywords
comparator
output voltage
phase comparator
period
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6352679A
Other languages
Japanese (ja)
Other versions
JPS6224971B2 (en
Inventor
Kiyonori Tominaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP6352679A priority Critical patent/JPS55154833A/en
Publication of JPS55154833A publication Critical patent/JPS55154833A/en
Publication of JPS6224971B2 publication Critical patent/JPS6224971B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/107—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth
    • H03L7/1077—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using a variable transfer function for the loop, e.g. low pass filter having a variable bandwidth by changing characteristics of the phase or frequency detection means

Landscapes

  • Video Image Reproduction Devices For Color Tv Systems (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To widen a holding range by taking out an output voltage in a period when the signal of a phase comparator resides via LPF of a large time constant and then by comparing it to a level at which an output voltage in the signal absence period of the comparator is sampled and held. CONSTITUTION:Phase comparator 101, LPF104 of a small time constant, voltage control oscillator 102 and 1/N divider 103 are provided so as to constitute PLL circuit 100 used for a beam index type color TV receiver, etc.; and an output voltage in a period when a signal resides in phase comparator 101 is applied to LPF105 of a large time constant, the output of which is inputted to level comparator 106. To the other input of comparator 106, a potential obtained by sampling and holding extracted by switch 111 and an integrating circuit and in the signal absence period of phase comparator 101 and the potential is compared to the other input. Without reference to the drift of the output voltage, a holding range is widened to prevent parasitic oscillation occurring the whole loop including picture tube 10, thereby eliminating longitudinal stripes on its screen.
JP6352679A 1979-05-23 1979-05-23 Pll circuit Granted JPS55154833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6352679A JPS55154833A (en) 1979-05-23 1979-05-23 Pll circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6352679A JPS55154833A (en) 1979-05-23 1979-05-23 Pll circuit

Publications (2)

Publication Number Publication Date
JPS55154833A true JPS55154833A (en) 1980-12-02
JPS6224971B2 JPS6224971B2 (en) 1987-06-01

Family

ID=13231743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6352679A Granted JPS55154833A (en) 1979-05-23 1979-05-23 Pll circuit

Country Status (1)

Country Link
JP (1) JPS55154833A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176844A (en) * 1981-04-23 1982-10-30 Mitsubishi Electric Corp Phase synchronizing oscillator
JPS61296823A (en) * 1985-06-25 1986-12-27 Canon Inc Phase locked loop

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176844A (en) * 1981-04-23 1982-10-30 Mitsubishi Electric Corp Phase synchronizing oscillator
JPS61296823A (en) * 1985-06-25 1986-12-27 Canon Inc Phase locked loop

Also Published As

Publication number Publication date
JPS6224971B2 (en) 1987-06-01

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