JPS55151355A - Ultrahigh frequency high output semiconductor device - Google Patents

Ultrahigh frequency high output semiconductor device

Info

Publication number
JPS55151355A
JPS55151355A JP5931979A JP5931979A JPS55151355A JP S55151355 A JPS55151355 A JP S55151355A JP 5931979 A JP5931979 A JP 5931979A JP 5931979 A JP5931979 A JP 5931979A JP S55151355 A JPS55151355 A JP S55151355A
Authority
JP
Japan
Prior art keywords
package
stud
set screw
semiconductor device
radius
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5931979A
Other languages
Japanese (ja)
Other versions
JPS604592B2 (en
Inventor
Hidetake Suzuki
Tatsuo Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP5931979A priority Critical patent/JPS604592B2/en
Publication of JPS55151355A publication Critical patent/JPS55151355A/en
Publication of JPS604592B2 publication Critical patent/JPS604592B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To reduce the parasitic capacity of a semiconductor device by equalizing the width of the package and the stud to the diameter of the set screws for mounting the stud in a GaAs field effect transistor or the like and providing the upper surface of the threads of a stud higher than the lower surface of the terminal of a package. CONSTITUTION:The width 9 of the package 1 such as a ceramic or the like is equalized to that 10 of a stud 2 formed under the package substantially to the diameter of set screw such as, for example 2mm. in size. The shape of the stud at the set screw is formed, for example, in recess 11 of the radius of approx. 1mm. substantially equal to the radius of the screw. The upper surface of the set screw, that is, the pressure contact surface 12 making contact with the head 15 of the set screw is higher by h, that is, 0.3-0.5mm. than the lower surface of the terminals 7, 7' of the package. In this manner, the distance from the FET chip electrode in the package through the terminal to the connectors 8, 8' of the input/output matching circuits 4, 4' is shortened to reduce the parasitic inductance so as to easily match it with an external circuit.
JP5931979A 1979-05-15 1979-05-15 Ultra high frequency high power semiconductor device Expired JPS604592B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5931979A JPS604592B2 (en) 1979-05-15 1979-05-15 Ultra high frequency high power semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5931979A JPS604592B2 (en) 1979-05-15 1979-05-15 Ultra high frequency high power semiconductor device

Publications (2)

Publication Number Publication Date
JPS55151355A true JPS55151355A (en) 1980-11-25
JPS604592B2 JPS604592B2 (en) 1985-02-05

Family

ID=13109913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5931979A Expired JPS604592B2 (en) 1979-05-15 1979-05-15 Ultra high frequency high power semiconductor device

Country Status (1)

Country Link
JP (1) JPS604592B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2702594A1 (en) * 1993-03-12 1994-09-16 Thomson Csf Bipolar transistor connection mounting method.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2702594A1 (en) * 1993-03-12 1994-09-16 Thomson Csf Bipolar transistor connection mounting method.

Also Published As

Publication number Publication date
JPS604592B2 (en) 1985-02-05

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