JPS5514544B2 - - Google Patents
Info
- Publication number
- JPS5514544B2 JPS5514544B2 JP981977A JP981977A JPS5514544B2 JP S5514544 B2 JPS5514544 B2 JP S5514544B2 JP 981977 A JP981977 A JP 981977A JP 981977 A JP981977 A JP 981977A JP S5514544 B2 JPS5514544 B2 JP S5514544B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D44/00—Charge transfer devices
- H10D44/01—Manufacture or treatment
- H10D44/041—Manufacture or treatment having insulated gates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/914—Doping
- Y10S438/924—To facilitate selective etching
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/947—Subphotolithographic processing
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Inorganic Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Electrodes Of Semiconductors (AREA)
- Weting (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US05/654,111 US4053349A (en) | 1976-02-02 | 1976-02-02 | Method for forming a narrow gap |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS52109880A JPS52109880A (en) | 1977-09-14 |
| JPS5514544B2 true JPS5514544B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1980-04-17 |
Family
ID=24623472
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP981977A Granted JPS52109880A (en) | 1976-02-02 | 1977-02-02 | Method of forming narrow gap in semiconductor |
Country Status (3)
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4131497A (en) * | 1977-07-12 | 1978-12-26 | International Business Machines Corporation | Method of manufacturing self-aligned semiconductor devices |
| DE2902665A1 (de) * | 1979-01-24 | 1980-08-07 | Siemens Ag | Verfahren zum herstellen von integrierten mos-schaltungen in silizium-gate- technologie |
| DE2939456A1 (de) * | 1979-09-28 | 1981-04-16 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur herstellung von integrierten halbleiterschaltungen, insbesondere ccd-schaltungen, mit selbstjustierten, nichtueberlappenden poly-silizium-elektroden |
| DE2939488A1 (de) * | 1979-09-28 | 1981-04-16 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur herstellung von integrierten halbleiterschaltungen, insbesondere ccd-schaltungen, mit selbstjustierten, nicht ueberlappenden poly-silizium-elektroden |
| US4359816A (en) * | 1980-07-08 | 1982-11-23 | International Business Machines Corporation | Self-aligned metal process for field effect transistor integrated circuits |
| US4318759A (en) * | 1980-07-21 | 1982-03-09 | Data General Corporation | Retro-etch process for integrated circuits |
| JPS5864044A (ja) * | 1981-10-14 | 1983-04-16 | Toshiba Corp | 半導体装置の製造方法 |
| US4407696A (en) * | 1982-12-27 | 1983-10-04 | Mostek Corporation | Fabrication of isolation oxidation for MOS circuit |
| NL8302541A (nl) * | 1983-07-15 | 1985-02-01 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting, en halfgeleiderinrichting vervaardigd volgens de werkwijze. |
| US4454002A (en) * | 1983-09-19 | 1984-06-12 | Harris Corporation | Controlled thermal-oxidation thinning of polycrystalline silicon |
| CA1260754A (en) * | 1983-12-26 | 1989-09-26 | Teiji Majima | Method for forming patterns and apparatus used for carrying out the same |
| GB8406432D0 (en) * | 1984-03-12 | 1984-04-18 | British Telecomm | Semiconductor devices |
| NL8402859A (nl) * | 1984-09-18 | 1986-04-16 | Philips Nv | Werkwijze voor het vervaardigen van submicrongroeven in bijvoorbeeld halfgeleidermateriaal en met deze werkwijze verkregen inrichtingen. |
| NL8501338A (nl) * | 1985-05-10 | 1986-12-01 | Philips Nv | Ladingsgekoppelde halfgeleiderinrichting en werkwijze ter vervaardiging daarvan. |
| NL8501339A (nl) * | 1985-05-10 | 1986-12-01 | Philips Nv | Halfgeleiderinrichting en werkwijze ter vervaardiging daarvan. |
| US4652339A (en) * | 1986-02-24 | 1987-03-24 | The United States Of America As Represented By The Secretary Of The Air Force | CCD gate definition process |
| GB2262654B (en) * | 1991-12-13 | 1995-07-12 | Marconi Gec Ltd | Fabrication process |
| JPH11340436A (ja) * | 1998-05-25 | 1999-12-10 | Nec Corp | 半導体記憶装置の製造方法 |
| US6961279B2 (en) * | 2004-03-10 | 2005-11-01 | Linear Technology Corporation | Floating gate nonvolatile memory circuits and methods |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1292060A (en) * | 1969-04-15 | 1972-10-11 | Tokyo Shibaura Electric Co | A method of manufacturing a semiconductor device |
| US3810795A (en) * | 1972-06-30 | 1974-05-14 | Ibm | Method for making self-aligning structure for charge-coupled and bucket brigade devices |
| US3911560A (en) * | 1974-02-25 | 1975-10-14 | Fairchild Camera Instr Co | Method for manufacturing a semiconductor device having self-aligned implanted barriers with narrow gaps between electrodes |
-
1976
- 1976-02-02 US US05/654,111 patent/US4053349A/en not_active Expired - Lifetime
-
1977
- 1977-01-26 DE DE19772703013 patent/DE2703013A1/de not_active Withdrawn
- 1977-02-02 JP JP981977A patent/JPS52109880A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| US4053349A (en) | 1977-10-11 |
| DE2703013A1 (de) | 1977-08-11 |
| JPS52109880A (en) | 1977-09-14 |