JPS55135454A - Wave detection circuit - Google Patents

Wave detection circuit

Info

Publication number
JPS55135454A
JPS55135454A JP4273379A JP4273379A JPS55135454A JP S55135454 A JPS55135454 A JP S55135454A JP 4273379 A JP4273379 A JP 4273379A JP 4273379 A JP4273379 A JP 4273379A JP S55135454 A JPS55135454 A JP S55135454A
Authority
JP
Japan
Prior art keywords
signal
counter
frequency
pulse
reset
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4273379A
Other languages
Japanese (ja)
Other versions
JPS5856296B2 (en
Inventor
Isao Arai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Original Assignee
Seiko Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP54042733A priority Critical patent/JPS5856296B2/en
Publication of JPS55135454A publication Critical patent/JPS55135454A/en
Publication of JPS5856296B2 publication Critical patent/JPS5856296B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/02Amplitude-modulated carrier systems, e.g. using on-off keying; Single sideband or vestigial sideband modulation
    • H04L27/06Demodulator circuits; Receiver circuits
    • H04L27/066Carrier recovery circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Selective Calling Equipment (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To obtain the envelope detection output of the burst signal only when the normal burst signal is supplied, by monitoring the burst cycle of the transmission signal with one counter and then monitoring the frequency of the transmission signal with the other counter respectively. CONSTITUTION:The burst signal features the cycle of t2 between t1 and the frequency with frequency f1. With the count number set to n for counter 12, output Q changes from LOW to HIGH at count n to reset DFF11. Counter 13 counts the time between pulses and then supplies the pulse of freqeucny f2 higher than signal frequency f1 via transmission gate 17. At this moment, the clock of the system is appropriate for the pulse of frequency f2. Accordingly, DFF11 is never reset by the output of counter 13 as long as signal f1 features the normal frequency since counter 13 is reset by pulse 2 of signal f1.
JP54042733A 1979-04-09 1979-04-09 Detection circuit Expired JPS5856296B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54042733A JPS5856296B2 (en) 1979-04-09 1979-04-09 Detection circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54042733A JPS5856296B2 (en) 1979-04-09 1979-04-09 Detection circuit

Publications (2)

Publication Number Publication Date
JPS55135454A true JPS55135454A (en) 1980-10-22
JPS5856296B2 JPS5856296B2 (en) 1983-12-14

Family

ID=12644232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54042733A Expired JPS5856296B2 (en) 1979-04-09 1979-04-09 Detection circuit

Country Status (1)

Country Link
JP (1) JPS5856296B2 (en)

Also Published As

Publication number Publication date
JPS5856296B2 (en) 1983-12-14

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