JPS55134456A - Diagnostic processing unit of logic unit - Google Patents

Diagnostic processing unit of logic unit

Info

Publication number
JPS55134456A
JPS55134456A JP4100379A JP4100379A JPS55134456A JP S55134456 A JPS55134456 A JP S55134456A JP 4100379 A JP4100379 A JP 4100379A JP 4100379 A JP4100379 A JP 4100379A JP S55134456 A JPS55134456 A JP S55134456A
Authority
JP
Japan
Prior art keywords
shift
terminal
scan path
logic unit
diagnostic scan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4100379A
Other languages
Japanese (ja)
Other versions
JPS6155133B2 (en
Inventor
Kiyoshi Shimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP4100379A priority Critical patent/JPS55134456A/en
Publication of JPS55134456A publication Critical patent/JPS55134456A/en
Publication of JPS6155133B2 publication Critical patent/JPS6155133B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To make it possible to point out a faulty position even if the fault which is fixed to the same logical value as the initial value of a logic unit occurs in the diagnostic scan path, by adopting the diagnostic scan path where shift data is inverted at every one-bit shift.
CONSTITUTION: When the signal given to input terminal 2 becomes logical 1, the scan-out operation is started, and shift clocks are applied to an inversion-type shift register constituted by FFs SF1WSFN and the diagnostic scan path of a diagnosed logic unit connected to output terminal 6. When scan shift is performed N-number times, shift clocks are stopped. Next, when the signal applied to input treminal 3 becomes logical 1, the scan-in operation is started, and shift clocks are spplied to the diagnostic scan path of the diagnosed logic unit through output terminal 6, and the output of the Q terminal or the Q terminal of FF SFN is selected dependently upon the even or odd number of FFs constituting the diagnostic scan path and is given to terminal 5. Then, after the end of the operation, the value of the FF of the diagnosed unit is read into FFs SR1WSRN.
COPYRIGHT: (C)1980,JPO&Japio
JP4100379A 1979-04-06 1979-04-06 Diagnostic processing unit of logic unit Granted JPS55134456A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4100379A JPS55134456A (en) 1979-04-06 1979-04-06 Diagnostic processing unit of logic unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4100379A JPS55134456A (en) 1979-04-06 1979-04-06 Diagnostic processing unit of logic unit

Publications (2)

Publication Number Publication Date
JPS55134456A true JPS55134456A (en) 1980-10-20
JPS6155133B2 JPS6155133B2 (en) 1986-11-26

Family

ID=12596217

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4100379A Granted JPS55134456A (en) 1979-04-06 1979-04-06 Diagnostic processing unit of logic unit

Country Status (1)

Country Link
JP (1) JPS55134456A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3906312C1 (en) * 1989-02-28 1989-12-21 Man Nutzfahrzeuge Ag, 8000 Muenchen, De

Also Published As

Publication number Publication date
JPS6155133B2 (en) 1986-11-26

Similar Documents

Publication Publication Date Title
KR880014475A (en) Semiconductor integrated circuit device
KR880003247A (en) Semiconductor integrated circuit device
EP0382184A3 (en) Circuit for testability
JPS5618766A (en) Testing apparatus for logic circuit
EP0017091B1 (en) Two-mode-shift register/counter device
US7007201B1 (en) Shared embedded trace macrocell
JPS55134456A (en) Diagnostic processing unit of logic unit
EP0196152A3 (en) Testing digital integrated circuits
JPS57168337A (en) Asynchronous logic circuit
JPS5572261A (en) Logic unit
JPS5549760A (en) Information processing unit diagnostic system
JPH0210178A (en) Logic circuit
JP2509685B2 (en) Logic circuit device
JPS55128168A (en) Testing method of memory in chip
SU1672453A1 (en) Easy-to-test logical device
JPS5690271A (en) Testing method for logic device
JPS5692648A (en) Logic circuit for diagnosis
SU632093A1 (en) First event detecting device
KR100230411B1 (en) Semicomductor device
KR20010047489A (en) A method for testing a circuit with two phase clocks using boundary scan
JPS6454380A (en) Electronic circuit package with automatic testing function
JPS61126821A (en) Logic lsi circuit
JPH0334034A (en) Integrated circuit
JPS63255672A (en) Test circuit for circuit block
JPS5562373A (en) Logic circuit test unit