JPS55132588A - Method of fabricating bubble memory chip - Google Patents

Method of fabricating bubble memory chip

Info

Publication number
JPS55132588A
JPS55132588A JP314380A JP314380A JPS55132588A JP S55132588 A JPS55132588 A JP S55132588A JP 314380 A JP314380 A JP 314380A JP 314380 A JP314380 A JP 314380A JP S55132588 A JPS55132588 A JP S55132588A
Authority
JP
Japan
Prior art keywords
memory chip
bubble memory
fabricating
fabricating bubble
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP314380A
Other languages
Japanese (ja)
Other versions
JPS598908B2 (en
Inventor
Patoritsuku Bonii Jiin
Konran Shiyausutaa Suchiibun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Control Data Corp
Original Assignee
Control Data Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Control Data Corp filed Critical Control Data Corp
Publication of JPS55132588A publication Critical patent/JPS55132588A/en
Publication of JPS598908B2 publication Critical patent/JPS598908B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
    • G11C19/02—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements
    • G11C19/08—Digital stores in which the information is moved stepwise, e.g. shift registers using magnetic elements using thin films in plane structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
    • H01F41/32—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying conductive, insulating or magnetic material on a magnetic film, specially adapted for a thin magnetic film
    • H01F41/34—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for applying conductive, insulating or magnetic material on a magnetic film, specially adapted for a thin magnetic film in patterns, e.g. by lithography

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Magnetic Films (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP314380A 1979-03-27 1980-01-17 Bubble memory chip manufacturing method Expired JPS598908B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US2399579A 1979-03-27 1979-03-27
US23995 1979-03-27

Publications (2)

Publication Number Publication Date
JPS55132588A true JPS55132588A (en) 1980-10-15
JPS598908B2 JPS598908B2 (en) 1984-02-28

Family

ID=21818297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP314380A Expired JPS598908B2 (en) 1979-03-27 1980-01-17 Bubble memory chip manufacturing method

Country Status (6)

Country Link
JP (1) JPS598908B2 (en)
AU (1) AU532007B2 (en)
CA (1) CA1135852A (en)
DE (1) DE2947952C2 (en)
FR (1) FR2452762A1 (en)
GB (1) GB2046040B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2539556B1 (en) * 1983-01-13 1986-03-28 Commissariat Energie Atomique METHOD FOR MANUFACTURING CONDUCTORS FOR INTEGRATED CIRCUITS, IN PLANAR TECHNOLOGY

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3985597A (en) * 1975-05-01 1976-10-12 International Business Machines Corporation Process for forming passivated metal interconnection system with a planar surface
US4088490A (en) * 1976-06-14 1978-05-09 International Business Machines Corporation Single level masking process with two positive photoresist layers
US4178635A (en) * 1976-06-14 1979-12-11 Hewlett-Packard Company Planar and near planar magnetic bubble circuits
US4092442A (en) * 1976-12-30 1978-05-30 International Business Machines Corporation Method of depositing thin films utilizing a polyimide mask

Also Published As

Publication number Publication date
AU5501180A (en) 1980-10-02
DE2947952C2 (en) 1985-01-10
DE2947952A1 (en) 1980-10-09
FR2452762B1 (en) 1985-05-10
AU532007B2 (en) 1983-09-15
JPS598908B2 (en) 1984-02-28
GB2046040B (en) 1983-03-16
GB2046040A (en) 1980-11-05
CA1135852A (en) 1982-11-16
FR2452762A1 (en) 1980-10-24

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