JPS55128992A - Time-division switch circuit - Google Patents

Time-division switch circuit

Info

Publication number
JPS55128992A
JPS55128992A JP3600979A JP3600979A JPS55128992A JP S55128992 A JPS55128992 A JP S55128992A JP 3600979 A JP3600979 A JP 3600979A JP 3600979 A JP3600979 A JP 3600979A JP S55128992 A JPS55128992 A JP S55128992A
Authority
JP
Japan
Prior art keywords
information
switch
circuit
terminal
time slot
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3600979A
Other languages
Japanese (ja)
Inventor
Tadashi Nakanishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP3600979A priority Critical patent/JPS55128992A/en
Publication of JPS55128992A publication Critical patent/JPS55128992A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q11/00—Selecting arrangements for multiplex systems
    • H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)

Abstract

PURPOSE:To realize a time-division switch featuring the double operating speed by providing two sets of temporary memory circuits with the simultaneous writing and reading carried out for those temporary memory circuits and also inverting the writing and reading with every cycle of the time-division switch. CONSTITUTION:When the first frame head signal is supplied, the switch circuits delivers all information of terminal A. Then the information is read out through terminal D0 of temporary memory circuit 0 and via the address information given from the switch memory to be sent to the time slot of the outgoing side via switch circuit 2. On the other hand, the time slot information of the incoming side is written into temporary memory circuit 1. And with supply of the next frame head signal, the switch circuits all deliver the information to be supplied to terminal B. As a result, the information of the input time slot is written into circuit 0. On the other hand, the address information is supplied to circuit 1 from the switch memory via switch circuit 1, and accordingly the information written previously is read out to the time slot of the outgoing side through terminal D0.
JP3600979A 1979-03-27 1979-03-27 Time-division switch circuit Pending JPS55128992A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3600979A JPS55128992A (en) 1979-03-27 1979-03-27 Time-division switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3600979A JPS55128992A (en) 1979-03-27 1979-03-27 Time-division switch circuit

Publications (1)

Publication Number Publication Date
JPS55128992A true JPS55128992A (en) 1980-10-06

Family

ID=12457756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3600979A Pending JPS55128992A (en) 1979-03-27 1979-03-27 Time-division switch circuit

Country Status (1)

Country Link
JP (1) JPS55128992A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61189096A (en) * 1985-02-18 1986-08-22 Hitachi Ltd Memory control circuit of time switch

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5183404A (en) * 1975-01-17 1976-07-22 Fujitsu Ltd TAIMUSUROT SUTOHEN KANHOSHIKI

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5183404A (en) * 1975-01-17 1976-07-22 Fujitsu Ltd TAIMUSUROT SUTOHEN KANHOSHIKI

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61189096A (en) * 1985-02-18 1986-08-22 Hitachi Ltd Memory control circuit of time switch

Similar Documents

Publication Publication Date Title
ATE24617T1 (en) DIRECT ACCESS STORAGE ARRANGEMENTS.
JPS51118341A (en) Shift register type memory
JPS51113427A (en) Information processing device
JPS55128992A (en) Time-division switch circuit
JPS5690341A (en) Buffer switching system
JPS522330A (en) Data processig unit
JPS5265628A (en) Information processing device
JPS5333546A (en) Communication control unit
JPS5317046A (en) Program writing system
JPS57127982A (en) Memory address system
JPS5354429A (en) Memory device
JPS5332636A (en) Ic memory
JPS54128226A (en) Random access memory
JPS53132231A (en) Control unit for data write-in
JPS54132135A (en) Memory control unit
JPS573291A (en) Associative memory circuit
JPS5219008A (en) Memory switch system
JPS51147918A (en) Memory writing circuit
JPS5255410A (en) Serial-parallel conversion system
JPS5399729A (en) Voice desk calculator
JPS55118290A (en) Connection system for representative of extension
JPS52106640A (en) Memory peripheral circuit
JPS6465962A (en) Telephone set
JPS52149924A (en) Address converter
JPS522247A (en) Data processing apparatus