JPS55123169A - Manufacture of charge-coupled device - Google Patents

Manufacture of charge-coupled device

Info

Publication number
JPS55123169A
JPS55123169A JP2997079A JP2997079A JPS55123169A JP S55123169 A JPS55123169 A JP S55123169A JP 2997079 A JP2997079 A JP 2997079A JP 2997079 A JP2997079 A JP 2997079A JP S55123169 A JPS55123169 A JP S55123169A
Authority
JP
Japan
Prior art keywords
film
layers
layer
masks
sio2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2997079A
Other languages
Japanese (ja)
Inventor
Nobuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP2997079A priority Critical patent/JPS55123169A/en
Publication of JPS55123169A publication Critical patent/JPS55123169A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823406—Combination of charge coupled devices, i.e. CCD, or BBD

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To obtain a two-phase driving CCD of good transfer characteristic by a method wherein the end of each transfer electrode and the end of each island semiconductor layer which is to become a potential barrier are self-matched and thereby a well of an ideal potential is formed below each transfer electrode. CONSTITUTION:On the surface of an Si substrate 11 of one conduction type are laminated layers of an opposite conduction type layer 14, an SiO2 film 12, an Si3N4 film 13 and subsequently, polycrystalline Si layer 15 which is to become transfer electrodes on one side and which contains a high concentration impurity, an SiO2 film 16 and an Si3N4 film 14. Next, photoresist film masks 18a-18f are provided at fixed intervals on top of this. By etching, the laminated layers between these masks up to the film 16 are removed. By ion injection, island semiconductor layers 19a-19f are formed in the layer 14. Subsequently, masks are renewed, and SiO2 films 20 and 16 are provided covering one island semiconductor layer totally and expanding over to the edge of the adjacent layers, and by etching, the 1st transfer electrodes 15a-15c are obtained. These are surrounded by SiO2 films 24a-24c, and the 2nd transfer electrodes 25a-25d are provided on layers 19a-19f.
JP2997079A 1979-03-16 1979-03-16 Manufacture of charge-coupled device Pending JPS55123169A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2997079A JPS55123169A (en) 1979-03-16 1979-03-16 Manufacture of charge-coupled device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2997079A JPS55123169A (en) 1979-03-16 1979-03-16 Manufacture of charge-coupled device

Publications (1)

Publication Number Publication Date
JPS55123169A true JPS55123169A (en) 1980-09-22

Family

ID=12290813

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2997079A Pending JPS55123169A (en) 1979-03-16 1979-03-16 Manufacture of charge-coupled device

Country Status (1)

Country Link
JP (1) JPS55123169A (en)

Similar Documents

Publication Publication Date Title
JPS6336566A (en) Semiconductor device
GB1461644A (en) Self-aligned ccd element including fabrication method therefor
US4766089A (en) Method of manufacturing a charge-coupled device
JPH07176724A (en) Charge transfer device and preparation thereof
JPH07321332A (en) Mis type semiconductor device and its manufacturing method
JPS55123169A (en) Manufacture of charge-coupled device
US4732868A (en) Method of manufacture of a uniphase CCD
GB1444047A (en) Charge transfer semiconductor devices and methods of fabricating such devices
JPH03263330A (en) Semiconductor device
JPS63116466A (en) Formation for electrode of charge coupled device
JP2826963B2 (en) Charge coupled device and method of manufacturing the same
JP2867469B2 (en) Charge transfer device and method of manufacturing the same
JPS60242674A (en) Thin-film transistor and manufacture thereof
JPH02278767A (en) Solid-state image sensing device
JPH0687481B2 (en) Method of manufacturing isolation
JPH05182992A (en) Manufacture of solid-state image sensing element
JPS55123170A (en) Manufacture of charge-coupled device
JPH04208572A (en) Manufacture of semiconductor memory
JPH0821711B2 (en) Charge transfer device
KR0167669B1 (en) Method for fabricating semiconductor device
JPH03171775A (en) Thin film transistor and manufacture thereof
KR970077705A (en) Solid-state imaging device manufacturing method
JPH0227741A (en) Charge coupled element
JPH0430568A (en) Semiconductor device
JPS6161467A (en) Semiconductor device and manufacture thereof