JPS55118654A - Manufacture of high density circuit substrate - Google Patents

Manufacture of high density circuit substrate

Info

Publication number
JPS55118654A
JPS55118654A JP2649179A JP2649179A JPS55118654A JP S55118654 A JPS55118654 A JP S55118654A JP 2649179 A JP2649179 A JP 2649179A JP 2649179 A JP2649179 A JP 2649179A JP S55118654 A JPS55118654 A JP S55118654A
Authority
JP
Japan
Prior art keywords
hole
film
high density
sheet
paste
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2649179A
Other languages
Japanese (ja)
Other versions
JPS6337518B2 (en
Inventor
Nobuo Kamehara
Seiichi Yamada
Koichi Niwa
Kyohei Murakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2649179A priority Critical patent/JPS55118654A/en
Publication of JPS55118654A publication Critical patent/JPS55118654A/en
Publication of JPS6337518B2 publication Critical patent/JPS6337518B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4867—Applying pastes or inks, e.g. screen printing

Landscapes

  • Engineering & Computer Science (AREA)
  • Ceramic Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PURPOSE:To provide a high density circuit substrate by burying conductive paste in a groove provided with photosensitive film laminated on a Mylar film, perforating a through hole at the film after forming a green sheet, burying the paste in the hole, separating the Mylar film and laminating the sheet thus obtained. CONSTITUTION:A photosensitive film 1 is laminated on a Mylar film 2, exposed with light, developed, and a groove 5 for a conductor circuit is formed thereon. After a conductor paste 6 is buried in the groove 5 by means of screen printing process or the like, a ceramic sheet 7 is formed as a green sheet on the film 1. A fine through hole 8 is perforated for a vertical hole by a laser or the like, and the paste is filled in the hole as a conductive hole 9. By separating the film 2 there obtained a sheet 7' having a fine conductor circuit 6 and the hole 9. The sheet 7' is then laminated, calcined, and a high density circuit substrate is formed. Accordingly, a fine conductor circuit width can be obtained to carry high density integrated element thereon.
JP2649179A 1979-03-07 1979-03-07 Manufacture of high density circuit substrate Granted JPS55118654A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2649179A JPS55118654A (en) 1979-03-07 1979-03-07 Manufacture of high density circuit substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2649179A JPS55118654A (en) 1979-03-07 1979-03-07 Manufacture of high density circuit substrate

Publications (2)

Publication Number Publication Date
JPS55118654A true JPS55118654A (en) 1980-09-11
JPS6337518B2 JPS6337518B2 (en) 1988-07-26

Family

ID=12194961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2649179A Granted JPS55118654A (en) 1979-03-07 1979-03-07 Manufacture of high density circuit substrate

Country Status (1)

Country Link
JP (1) JPS55118654A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0748261A4 (en) * 1992-03-30 1995-02-15 Vistatech Corp Layered chip structure

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5064768A (en) * 1973-10-12 1975-06-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5064768A (en) * 1973-10-12 1975-06-02

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0748261A4 (en) * 1992-03-30 1995-02-15 Vistatech Corp Layered chip structure
EP0748261A1 (en) * 1992-03-30 1996-12-18 Vistatech Corporation Layered chip structure

Also Published As

Publication number Publication date
JPS6337518B2 (en) 1988-07-26

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