JPS5511614A - Mis field effective type transistor analog signal amplifier circuit - Google Patents
Mis field effective type transistor analog signal amplifier circuitInfo
- Publication number
- JPS5511614A JPS5511614A JP8374578A JP8374578A JPS5511614A JP S5511614 A JPS5511614 A JP S5511614A JP 8374578 A JP8374578 A JP 8374578A JP 8374578 A JP8374578 A JP 8374578A JP S5511614 A JPS5511614 A JP S5511614A
- Authority
- JP
- Japan
- Prior art keywords
- amplifier circuit
- analog signal
- line
- phase
- signal amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—DC amplifiers in which all stages are DC-coupled
- H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
- H03F3/345—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with field-effect devices
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
PURPOSE:To obtain the steady desired phase characteristics by securing such circuit constitution that the signal output obtained via the output line may be fed back to the gate of MISFET for load via the phase compensating capacity. CONSTITUTION:In the MISFET analog signal amplifier circuit, the signal output obtained via signal line 5 led out from amplifier circuit A1 is fed back to the gate of MISFETQ2 for load of A1 via phase compensating capacity 7. When analog signal input S1 is supplied to signal input line 1 with DC bias input line 3 connected to DC bias power circuit 10, signal output S2 of the opposite phase to S1 is obtained at output line 5. And part of S2 is fed back 7 to the gate of Q2, and accordingly the internal impedance is controlled between the source and drain of Q2. As a result, S2 is obtained in the form of the phase-compensated signal output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8374578A JPS5511614A (en) | 1978-07-10 | 1978-07-10 | Mis field effective type transistor analog signal amplifier circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8374578A JPS5511614A (en) | 1978-07-10 | 1978-07-10 | Mis field effective type transistor analog signal amplifier circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5511614A true JPS5511614A (en) | 1980-01-26 |
Family
ID=13811055
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8374578A Pending JPS5511614A (en) | 1978-07-10 | 1978-07-10 | Mis field effective type transistor analog signal amplifier circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5511614A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59107926A (en) * | 1982-11-30 | 1984-06-22 | エムハート グラス マシーネリー インヴェストメンツ インコーポレイテッド | Metal mold open-close mechanism |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4998954A (en) * | 1972-12-29 | 1974-09-19 |
-
1978
- 1978-07-10 JP JP8374578A patent/JPS5511614A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4998954A (en) * | 1972-12-29 | 1974-09-19 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59107926A (en) * | 1982-11-30 | 1984-06-22 | エムハート グラス マシーネリー インヴェストメンツ インコーポレイテッド | Metal mold open-close mechanism |
| JPH0438697B2 (en) * | 1982-11-30 | 1992-06-25 |
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