JPS55112644A - Data write-in system in graphic display - Google Patents

Data write-in system in graphic display

Info

Publication number
JPS55112644A
JPS55112644A JP1972879A JP1972879A JPS55112644A JP S55112644 A JPS55112644 A JP S55112644A JP 1972879 A JP1972879 A JP 1972879A JP 1972879 A JP1972879 A JP 1972879A JP S55112644 A JPS55112644 A JP S55112644A
Authority
JP
Japan
Prior art keywords
data
signal
shift
inputted
converted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1972879A
Other languages
Japanese (ja)
Other versions
JPS6235140B2 (en
Inventor
Kazuo Okada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Universal KK
Original Assignee
Universal KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Universal KK filed Critical Universal KK
Priority to JP1972879A priority Critical patent/JPS55112644A/en
Publication of JPS55112644A publication Critical patent/JPS55112644A/en
Publication of JPS6235140B2 publication Critical patent/JPS6235140B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To enable to write-in with shift in bit unit, by shifting the data outputted from pattern ROM, dividing the data into two in response to the amount of shift, and writing in the front and rear sections into disply RAM twice. CONSTITUTION:The readout data from the pattern ROM10 is inputted to the 8 sets of shift registers 12a-12h, and the data are shifted by selecting the input signal. The data shifted in bit unit are divided into the front and rear sections, and written in the display RAMs 6a-6b twice. The data is read out at the readout mode with the H4 clock signal and after being inputted to the parallel-serial conversion circuits 7a-7c, it is converted into serial signal and outputted. This signal is converted into color video signal at the color conversion ROM22.
JP1972879A 1979-02-23 1979-02-23 Data write-in system in graphic display Granted JPS55112644A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1972879A JPS55112644A (en) 1979-02-23 1979-02-23 Data write-in system in graphic display

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1972879A JPS55112644A (en) 1979-02-23 1979-02-23 Data write-in system in graphic display

Publications (2)

Publication Number Publication Date
JPS55112644A true JPS55112644A (en) 1980-08-30
JPS6235140B2 JPS6235140B2 (en) 1987-07-30

Family

ID=12007365

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1972879A Granted JPS55112644A (en) 1979-02-23 1979-02-23 Data write-in system in graphic display

Country Status (1)

Country Link
JP (1) JPS55112644A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810135U (en) * 1981-07-13 1983-01-22 横河電機株式会社 graphic display device
JPS6039686A (en) * 1983-08-12 1985-03-01 富士通株式会社 Pattern writing circuit
JPS6066291A (en) * 1983-09-21 1985-04-16 富士通株式会社 Memory plain writing control system
JPS60258666A (en) * 1984-06-05 1985-12-20 Mitsubishi Electric Corp Intermemory data transfer device
JPS62169275A (en) * 1986-01-22 1987-07-25 Hitachi Ltd Memory system
JPS63271792A (en) * 1987-04-28 1988-11-09 Nec Corp Memory

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810135U (en) * 1981-07-13 1983-01-22 横河電機株式会社 graphic display device
JPS6039686A (en) * 1983-08-12 1985-03-01 富士通株式会社 Pattern writing circuit
JPS6066291A (en) * 1983-09-21 1985-04-16 富士通株式会社 Memory plain writing control system
JPH0214716B2 (en) * 1983-09-21 1990-04-09 Fujitsu Ltd
JPS60258666A (en) * 1984-06-05 1985-12-20 Mitsubishi Electric Corp Intermemory data transfer device
JPS62169275A (en) * 1986-01-22 1987-07-25 Hitachi Ltd Memory system
JPS63271792A (en) * 1987-04-28 1988-11-09 Nec Corp Memory

Also Published As

Publication number Publication date
JPS6235140B2 (en) 1987-07-30

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