JPS55110069A - Semiconductor memory device - Google Patents

Semiconductor memory device

Info

Publication number
JPS55110069A
JPS55110069A JP1615879A JP1615879A JPS55110069A JP S55110069 A JPS55110069 A JP S55110069A JP 1615879 A JP1615879 A JP 1615879A JP 1615879 A JP1615879 A JP 1615879A JP S55110069 A JPS55110069 A JP S55110069A
Authority
JP
Japan
Prior art keywords
layer
resistance
control
type
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1615879A
Other languages
Japanese (ja)
Other versions
JPS611900B2 (en
Inventor
Kazuo Yudasaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP1615879A priority Critical patent/JPS55110069A/en
Publication of JPS55110069A publication Critical patent/JPS55110069A/en
Publication of JPS611900B2 publication Critical patent/JPS611900B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0605—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits made of compound material, e.g. AIIIBV
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

PURPOSE:To feedback the output voltage of one inverter to the other, between a pair of inverters constituting an FF-type memory cell, and control the resistance of the other to an optimum value by the voltage fed back. CONSTITUTION:Load resistances R1', R2' are formed of controllable poly-Si. n- layer 1A for control electrode use is formed on p-type Si substrate 1. Via insulating film 1B, p-type poly-Si layer 1C for resistance use is formed, and also p<+>-layers S1, S2 and n<+>-layers T1, T2 are formed on both ends. Layer T1 is connected to potential point VM, layer T2 to potential source VCC, and n-layer 1A to potential point VN. The value of resistance R1' is almost determined by the concentration of p-layer 1C, and this can be considered as a p channel MOSFET, with drain S1(VM), source S2(VCC), and gat 1A(VN). R2' is formed in a similar manner. By this structure, control is exercised in such a way that power consumption is reduced by increasing resistances R1, R2 and the loss of information load due to leakage by decreasing them. Further, the effect of variation in R1' R2' is reduced by the resistance value control effected by the feedback electric field, so that stability is improved.
JP1615879A 1979-02-16 1979-02-16 Semiconductor memory device Granted JPS55110069A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1615879A JPS55110069A (en) 1979-02-16 1979-02-16 Semiconductor memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1615879A JPS55110069A (en) 1979-02-16 1979-02-16 Semiconductor memory device

Publications (2)

Publication Number Publication Date
JPS55110069A true JPS55110069A (en) 1980-08-25
JPS611900B2 JPS611900B2 (en) 1986-01-21

Family

ID=11908689

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1615879A Granted JPS55110069A (en) 1979-02-16 1979-02-16 Semiconductor memory device

Country Status (1)

Country Link
JP (1) JPS55110069A (en)

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674955A (en) * 1979-11-22 1981-06-20 Toshiba Corp Semiconductor device
JPS59104171A (en) * 1982-12-06 1984-06-15 Seiko Epson Corp Semiconductor device
JPH022661A (en) * 1988-06-17 1990-01-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit device and manufacture thereof
JPH0214566A (en) * 1989-04-10 1990-01-18 Seiko Epson Corp Cmos memory cell
JPH0214565A (en) * 1989-04-10 1990-01-18 Seiko Epson Corp Cmos memory cell
JPH0221655A (en) * 1989-04-10 1990-01-24 Seiko Epson Corp Cmos memory cell
JPH04211166A (en) * 1991-01-28 1992-08-03 Seiko Epson Corp Semiconductor device
JPH0669458A (en) * 1992-02-24 1994-03-11 Seiko Epson Corp Memory cell
JPH0677436A (en) * 1992-02-24 1994-03-18 Seiko Epson Corp Random access memory
US5298764A (en) * 1991-03-08 1994-03-29 Hitachi, Ltd. Semiconductor memory device having a field effect transistor with a channel formed from a polycrystalline silicon film
JPH06227424A (en) * 1991-06-03 1994-08-16 Norin Suisansyo Shikoku Nogyo Shikenjo Tractor
US5536951A (en) * 1993-06-24 1996-07-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having thin film transistor with diffusion preventing layer
US5770892A (en) * 1989-01-18 1998-06-23 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
EP0877425A2 (en) * 1990-05-31 1998-11-11 STMicroelectronics, Inc. Field effect device with polycrystalline silicon channel

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5674955A (en) * 1979-11-22 1981-06-20 Toshiba Corp Semiconductor device
JPH0454978B2 (en) * 1982-12-06 1992-09-01 Seiko Epson Corp
JPS59104171A (en) * 1982-12-06 1984-06-15 Seiko Epson Corp Semiconductor device
JPH022661A (en) * 1988-06-17 1990-01-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor integrated circuit device and manufacture thereof
US5770892A (en) * 1989-01-18 1998-06-23 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
JPH0459783B2 (en) * 1989-04-10 1992-09-24 Seiko Epson Corp
JPH0421349B2 (en) * 1989-04-10 1992-04-09 Seiko Epson Corp
JPH0221655A (en) * 1989-04-10 1990-01-24 Seiko Epson Corp Cmos memory cell
JPH0214565A (en) * 1989-04-10 1990-01-18 Seiko Epson Corp Cmos memory cell
JPH0421348B2 (en) * 1989-04-10 1992-04-09 Seiko Epson Corp
JPH0214566A (en) * 1989-04-10 1990-01-18 Seiko Epson Corp Cmos memory cell
EP0877425A2 (en) * 1990-05-31 1998-11-11 STMicroelectronics, Inc. Field effect device with polycrystalline silicon channel
EP0952614A1 (en) * 1990-05-31 1999-10-27 STMicroelectronics, Inc. Field effect device with polycrystaline silicon channel
EP0877425A3 (en) * 1990-05-31 1999-04-21 STMicroelectronics, Inc. Field effect device with polycrystalline silicon channel
JPH04211166A (en) * 1991-01-28 1992-08-03 Seiko Epson Corp Semiconductor device
US5298764A (en) * 1991-03-08 1994-03-29 Hitachi, Ltd. Semiconductor memory device having a field effect transistor with a channel formed from a polycrystalline silicon film
JPH06227424A (en) * 1991-06-03 1994-08-16 Norin Suisansyo Shikoku Nogyo Shikenjo Tractor
JPH0677436A (en) * 1992-02-24 1994-03-18 Seiko Epson Corp Random access memory
JPH0669458A (en) * 1992-02-24 1994-03-11 Seiko Epson Corp Memory cell
US5536951A (en) * 1993-06-24 1996-07-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having thin film transistor with diffusion preventing layer

Also Published As

Publication number Publication date
JPS611900B2 (en) 1986-01-21

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